On Sat, 14 May 2005, Timothy Miller wrote:

You'll be able to do this already.  Honestly, I don't think the RTL is
going to tell anyone anything they don't already know.  You know the
register structure, and you know the general pipelining.  What you
don't know (and don't care about) is exactly how many pipeline stages
are required for, say, the texture unit.  Some readers will be
interested in how I break it down, but the RTL will be much less
useful as documentation than the documentation that you'll already
have, in terms of useful programmers' reference.

Ok, I just thought that if people have access to it they can do incremental improvements...


You'll have all that.

Otherwise it wouldn't be open. :-)

The prototype board will be a huge enabler in this area.

I'm counting on it... :-)

And you know what Xilinx needs?  A good physical synthesis tool.  I'm
sure Xilinx wouldn't mind the free software community developing
software to get more bang out of their chips.

Yep!

Best regards

Peter K
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