Ok, I'm looking at it.  Care to paste it inline and explain how it's
different, better, etc?

Note that I separate out "next_gray_code( wr_ptr_nxt )" as a wire
because of a bug in icarus.

Also, I notice that you repeat some code (like that function call). 
Maybe this is stupid, but I don't trust synthesizers to always figure
out that it's the same code and that it should be one piece of logic,
and I've actually seen many cases where they don't.  This is
especially bad when inferring distributed RAMs; those always have to
be carefully separated out.

On 12/27/05, Pieter Hulshoff <[EMAIL PROTECTED]> wrote:
> On Tuesday 27 December 2005 02:02, Pieter Hulshoff wrote:
> > ... but if you don't mind I'd like to have a look at an alternative
> > implementation, just for comparison, tomorrow, and send it to this thread.
> > It'll also be a good opportunity for me to check how bad my Verilog
> > understanding truly is. :)
>
> OK, here's a first attempt. Let me know what you think, and be sure to point
> out mistakes (which I'm sure I've made). :)
>
> Regards,
>
> Pieter Hulshoff
>
> --
> The last good thing written in C was Franz Schubert's Symphony number 9.
> When your hammer is C++, everything begins to look like a thumb.
>
>
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