On 12/27/05, Pieter Hulshoff <[EMAIL PROTECTED]> wrote: > OK, here's a first attempt. Let me know what you think, and be sure to point > out mistakes (which I'm sure I've made). :) >
Also, your code looks a lot more like what I've seen from other professional chip designers. It's rigorous in its structure and naming conventions. You have two always blocks, which for a good synthesizer is fine, but I've encountered problems with specific synthesizers. I think that there are heuristics that they apply that require relatively strict separation of logic; if you lump everything together, they can't figure it out. For instance, ISE isn't good at inferring a shift register if it's spread out, so I have to put it in its own always block; there have been a few cases where I had to put the logic in its own module to get ISE to do what I wanted. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
