On Sat, 27 May 2006 13:08:41 -0400
"Timothy Miller" <[EMAIL PROTECTED]> wrote:
> I can see that this language issue is going to be a problem. Any
> ideas as to how to deal with it?
Choose one language and stick to it. We'll run into an infinite
amount of problems if we start to mix.
IMHO someone who knows VHDL or Verilog should be able
to quickly learn the other one. It's like someone who
knows Java learning C++. Takes a bit of of work until
the basics are known and the little differences in behaviour,
but overall an easy task.
> Lessons on the two languages? Who
> is willing to buy a book? I can point you to one that teaches them
> side-by-side.
I'd buy and read any good book. But i need a bigger bookshelf :)
For VHDL i suggest "The Designer's Guide to VHDL"
from Peter J. Ashenden (Morgan Kaufmann Publishers).
It's so far the best book i got my hands on. It teaches from the basics
up to a quite good level. It does not teach the basics of
VLSI design though!
Apropos. Does anyone know a good book/site/whatever to
teach people the basics, the methodologies and the tricks
of VLSI design? This will become an issue as soon as some
newbies will try to apply their knowledge from software
coding to hardware.
Attila Kinali
--
心をこめて聞け心をこめて話せ
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