Somebody pointed out to me yesterday that a mask set for a 250 nm
process isn't $2M, it's $50K.  And that's on SOI, which is much faster than
a normal 250 nm process, because it eliminates isolation junction
capacitance.
        How much logic is the TRV10 going to need?  Could it be implemented
with an older CMOS or SOI process that doesn't have such prohibitive
up-front costs?
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