Rogelio Serrano wrote:
htx just an interconnect, right? so its not really about being numa.
it just has direct access to memory at the same level as the cpu. its
just hypertransport that goes directly to a memory controller,
whether it is in the same die as the cpu or not. or whether the
system is numa or not.
Hyper transport supports NUMA, but you don't have to have multiple
sections of memory. However, I think that a video card would probably
have it's own memory as well as having direct access to the motherboard
memory.
The WikiPedia article is a little thin. There is a site:
http://www.hypertransport.org
what is the licensing cost to use hypertransport?
That has more information.
hypertransport is an interesting interconnect technology.
actually hypertransport helps to realise a true unified memory
architecture by allowing high bandwidth low latency communication to
system memory. this way you dont need local subsystem memory which is
the trend now. Imagine having over 1 gb of memory in subsystems
thats out of reach of the cpu and your memory manager. a gaming pc
can be built with 512 mb main memory and a 512 mb video card. if you
are not playing games that 512 mb is barely used at all. wouldnt it
be nice if you can have 512 mb main memory and have high powered
gaming when needed? 1 gb would be even better.
You probably wouldn't need a lot of memory on the video card -- just
enough to hold the actual video data being displayed and buffered --
since access to system memory would be direct and fast.
what matters in a unified memory architecture is direct access to
memory for all subsystems and for the cpu and drivers to have direct
access to subsystem data. the purpose is to minimise the copying of
data and simplify driver development.
I don't see that there would be any need to copy data. It is also
possible to use a cache since Hyper Transport supports cache coherency.
this actually makes user space drivers trivial. we are talking about
all subsystems here. that means the 3d engine, nic, hard disk, video,
usb and cpu. with current single port memory controllers this is not
going to work. somebody needs to invent a multiport memory
controller. maybe 4 to 8 ports.
is that actually possible?
You would probably get faster access using some sort of NUMA
architecture. This would be just the equivalent of multiple banks.
--
JRT
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