On 4/22/07, James Richard Tyrer <[EMAIL PROTECTED]> wrote:
Simon wrote:
>> On 4/21/07, James Richard Tyrer <[EMAIL PROTECTED]> wrote:

>
> According to wikipedia, HTX uses DMA, rather than a uniform
> architecture:
>
> http://en.wikipedia.org/wiki/HyperTransport#HTX_and_Co-processor_interconnect

        "HTX allows plug-in cards to be developed which support direct
        access to a CPU and DMA access to the system RAM"

It allows direct connection to a CPU and the CPU has the memory
controller.  AMD Hyper Transport CPUs have the memory controller on the
CPU NOT on the northbridge.  So something connected to one of the HT
connections on the CPU can directly access to memory.


single port memory

I think that this is an error in the WikiPedia article.  Direct access
to memory is not the same as DMA although a HTX connected device could
have a DMA controller for I/O operations.

HTX is not unified memory architecture, it is NUMA.  But, it is just as
fast on the motherboard and something connected with an HTX connector
works just the same as if it were on the motherboard -- the only
limitation is the data transport speed.  WikiPedia appears to say that
the connection through an HTX expansion connector is limited to 1.6 GB/s
which is rather fast.  But this appears to me wrong since HTX is DDR
which would mean that the maximum was 3.2 GB/s and apparently a 2x link
is possible for 6.4 GB/s.


thats a lot of bandwidth.

htx just an interconnect, right? so its not really about being numa.
it just has direct access to memory at the same level as the cpu. its
just hypertransport that goes directly to a memory controller, whether
it is in the same die as the cpu or not. or whether the system is numa
or not.

The WikiPedia article is a little thin.  There is a site:

        http://www.hypertransport.org


what is the licensing cost to use hypertransport?

That has more information.


hypertransport is an interesting interconnect technology.

actually hypertransport helps to realise a true unified memory
architecture by allowing high bandwidth low latency communication to
system memory. this way you dont need local subsystem memory which is
the trend now. Imagine having over 1 gb of memory in subsystems thats
out of reach of the cpu and your memory manager. a gaming pc can be
built with 512 mb main memory and a 512 mb video card. if you are not
playing games that 512 mb is barely used at all. wouldnt it be nice if
you can have 512 mb main memory and have high powered gaming when
needed? 1 gb would be even better.

what matters in a unified memory architecture is direct access to
memory for all subsystems and for the cpu and drivers to have direct
access to subsystem data. the purpose is to minimise the copying of
data and simplify driver development. this actually makes user space
drivers trivial. we are talking about all subsystems here. that means
the 3d engine, nic, hard disk, video, usb and cpu. with current single
port memory controllers this is not going to work. somebody needs to
invent a multiport memory controller. maybe 4 to 8 ports.

is that actually possible?

--
the thing i like with my linux pc is that i can sum up my complaints in 5 items
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