On 4/27/07, Jean-Baptiste Note <[EMAIL PROTECTED]> wrote:
But a global enable on the whole CPU, as you're suggesting, would presumably not cost you much, as Xilinx registers have a special enable wire IIRC.
Yeah. We're struggling, I guess, with a tradeoff between using the special reset wires vs. using the special enable wires to start/stop the CPU. In many cases, we're already using the enable wires, so the result here would be to add more logic to already existing enable computations. The bothersome thing about the enables is that they have to come from a separate LUT from the one whose register you're gating. That is, the D input to the register comes straight from the attached LUT, while the E input has to come from somewhere else. It's hard to say just whether using the E input or the R input is the superior choice for pausing the nanocontroller. We're taking a guess, and when I finally get around to synthesizing it, we'll have an idea of where the bottlenecks are. Also, you're right that we can power it up in a sane state straight away. But we also have the option of starting up with the controller halted and have the BIOS load the program. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
