On 11/6/07, [EMAIL PROTECTED] <[EMAIL PROTECTED]> wrote: > I posted to the wiki a module very similar to the unpreferably_IC74138. > I understand that it is harder to read (though makes more sense once you > realize what the 74138 does), but I was under the impression that it > would probably run faster or use less resources in actual hardware. Is > there any way to determine the method that will run faster besides spending > 45 minutes converting it to run in ISE or making an educated guess? I would > assume that the shifting version would run slower, due to more logic levels, > but use many fewer gates.
I think it would produce a barrel shifter which is either 3 layers of 2-to-1 muxes or 1 layer if 8-to-1 muxes. That's not much different from the case statement. In fact, the most likely result is that each will produce very similar logic. Consider the most direct solution: assign disable = G1_bar || G2_bar || !G; assign out[7] = (in != 7) || disable; assign out[6] = (in != 6) || disable; ... Each out bit will have to come from a LUT, so there are going to be at least 8. And since you're comparing against a constant, you can do every comparison in one LUT. Add another LUT (with fanout 8) for the enable. This is about as good as you can get, for an FPGA anyhow. For an ASIC, there MAY be more space-efficient solutions. Oh, and BTW, the above is exactly equivalent to: assign out[7] = !in[0] || !in[1] || !in[2] || disable; assign out[6] = in[0] || !in[1] || !in[2] || disable; assign out[5] = !in[0] || in[1] || !in[2] || disable; ... The big question is... which of the other designs will confuse the synthesizer into making less optimal logic? -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
