On 3/2/08, Viktor Pracht <[EMAIL PROTECTED]> wrote: > One big design question remains: the file format. Storing the schematic as > just Verilog will not work, unless we implement a P&R algorithm which can > deterministically layout any loaded Verilog module so well, that a user > won't even *want* to move stuff around.
We're not doing physical floor-planning here. We're doing high-level Verilog modules. P&R isn't involved. Or do you mean P&R in terms of how the Verilog modules are placed and routed visually in the IDE? > > The 2D layout will need to be stored either in Verilog comments (ugly) or > in a separate file (incosistencies). I would prefer the former option and > trying to improve the P&R to minimize the amount of information which needs > to be stored in comments. A realistic goal would be to merely need the > positions of ports and maybe an orientation of some submodules relative to > each other (e. g. "A is east of B"). Check out NetBeans. Create a simple Swing app. Notice how there are bits of auto-generated code that are hidden by default by the editor but can be expanded to show comments loudly warning about not editing this section of code. We can do the same thing. Some of our stuff is metadata, and when the metadata is missing (for instance from an import of existing code), then we just default to something sensible. Lots of our stuff is auto-generated code that describes the interconnects between modules. The most important part of this, to me, is the interconnecting glue modules that tie other blocks together, because this is the place where I make the most mistakes. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
