I am interested in getting started in designing functional FPGA designs for testing and hobbiest development on my soon-to-be-arriving OGD1. I am interested in the device primarily as a computational offload from the main machine. The potential of the device's parallelism is something I am extremely interested in.
I have located the following URLs to help me along and was hoping for a pointer or two (questions are down lower): Hardware Programming HowTo http://wiki.opengraphics.org/tiki-index.php?page=HardwareProgrammingTools And more generally, Development Tools http://wiki.opengraphics.org/tiki-index.php?page=Development_Tools Verilog Intro Lessons http://wiki.opengraphics.org/tiki-index.php?page=Introduction+to+Verilog The EPROMs are SST SST25VF016B-50-4CS2A and SST SST25VF010-20-4C-SAE by the bill of materials. I found the datasheets on sst.com and found the lifetimes of: http://www.sst.com/products/?inode=41333 SST25VF010A: 100,000 cycles http://www.sst.com/products/?inode=41335 SST25VF016B: 100,000 cycles I'm assuming the 16Mb chip is the one used for the FPGA to boot itself from on reset? That's a pretty high-endurance chip. And they both claim a data retention of 100 years. Neat. The Xilinx XC3S4000 datasheet (which DigiKey helpfully provided for download from their site) has been very helpful in understanding this chip better: http://parts.digikey.com/1/parts/1595504-spartan-3a-fpga-4m-900-fbga-xc3s4000-5fgg900c.html (Then down at the link labelled XC3S4000-5FGG900C Specification Sheet) Lattice LFXP10E-5FN256C Datasheet http://www.digchip.com/data/255/LFXP10C-3F256I.pdf I have some design books as well: Verilog HDL: A Guide to Digital Design and Synthesis, Verilog Designer's Library, and Real World FPGA Design with Verilog. I have some questions: ) Is the entire Lattice eaten up with the PCI communications/Xilinx programming logic? That is, is there anything leftover that might be able to meaningfully participate in computational offloads while still retaining its present functionality? ) Any other book recommendations? ) Programmability of the Lattice: do I truly just need a specialized parallel port cable for programming it, and then UrJTAG? Where can I get this cable anyway? Is there some super-cheap Chinese dealer with free worldwide shipping ala DealExtreme somewhere? Having trouble finding it.. :) ) Does anyone have a problem if I slurp out the entire SVN repository history using git-svn to build a remote internal mirror for myself? Thank you! Oh, can't wait for it to arrive..! Hee hee! _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
