2012/5/29 André Pouliot <[email protected]>: > Hi, > > I'm going to talk about some stuff related to the hardware. Unless I'm > mistaken, then Tim can correct me, Is that we are targeting no specific > hardware and go for the hardware OS project without doing hardware. Still > the logic and the functional module related to graphics gard and GPGPU stuff > is a worthy goal. But when we do have something let company or university do > the actual hardware. > > A few year ago making a video card did make sense, it's not the case > anymore. The volume is going toward embedded device: cellphone and tablet
If an opensource GPU exist. It will quite easy to even reuse futur demo board of any FPGA manufacturer with an Display port and a pci express link. You could even imagine that the manufacturer will do it for the gpu core. Ti have produce Beagle board to better introduce omap3 to hacker, and even the MSP430. > for content consumer. Video card are interesting for content producer, the > corporate market fill that gap in a good enough way for lot's of > application. At work I use windows7 all the software I use work on that > platform. There's some specialized software that run on Linux or Solaris. > But they are so specialized and costly that paying a video card 4k$ or 5K$ > doesn't matter. > > My own target for the project would be to do a GPGPU that's on the AMBDA bus I think you could do a generic GPGPU with a programming model developped on QEMU and then provide "many" different bus as AMBA and wishbone (the bus of opencores). > who's becoming a standard on ARM SOC. That bus is so common lot of thing are > using it and can be found on a lot of softcore and hard ip. Also do a few > generic IP: display port, HDMI(if there a way without license) and other > stuff. > > Eventually I also want to try for network on chip as a communication systen. > Network on chip for those who don't know is like sending packet on the > internet but on a chip. Sending packet between processor and peripheral, in > a practical way the different part of the chip becoming asynchronous from > each other. It have a few advantage: enabling device to react on advanced > interrupt system; flexible frequency scaling option; sleep mode; mixing > general processing element with very specific one and enabling a true > heterogeneous system. Micro-kernel also become a lot easier by changing the > fundamental way stuff work on the hardware. Professionnaly i had see mainly 2 soc design. A small one using the Leon using 4 internal buses going on a multilayer memory controller, using the fact that almost all data will travel from every bloc to or from the RAM. A parrallel APB was used for register configuration. I also see TI chip, with a mega udge interconnection in the middle to connect everything to everything, i don't speak to the designer to understand their choices but the result has a high power consumption, a quite a high latency for the cpu to reach the DRAM. Network in ring could be great for tens of cores but don't kill too much the latency. > > Anyway that's my take on some of the stuff that's possible and what I would > like to see happen. > > Not for money(it would be nice), but because it's cool and I like to learn > and play with new toys. > > PS. I'm a geek so sue me! ;) > > André > > _______________________________________________ > Open-graphics mailing list > [email protected] > http://lists.duskglow.com/mailman/listinfo/open-graphics > List service provided by Duskglow Consulting, LLC (www.duskglow.com) _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
