It's nice that someone remembers that we did succeed in making hardware. :)
There's lots of Verilog code that's been verified that they could adopt, but none of it accelerates graphics. If their goal is to build an ASIC with an OpenCores CPU on it, and they want to add graphics, they have to already have things like external interfaces, a memory system, etc. The only thing we can offer right now is our video controller. It's actually quite nice, in that it's micro-coded. You can program it to do any kind of video mode you like. For instance, we designed it to do progressive scan, but when we decided to add support for interlacing, we didn't need to change the hardware, only the microcode that has to be loaded anyway whenever you change modes. Here's an abbreviated list of the logic blocks we have that work on production OGD1 boards: - PCI controller (32-bit, 66MHz) - Various minor interfacing blocks (e.g. SPI) - A complete VGA/CGA text mode solution, along with microcode and BIOS - A microprogrammable video controller - A DDR memory controller - A memory arbitration system - A harvard architecture microcontroller - Other minor logic blocks (e.g. FIFOs) If I poked around in the repo, I could probably find some other things to mention. On Mon, Nov 12, 2012 at 9:16 PM, Peter Stuge <[email protected]> wrote: > Hej Olof! > > Olof Kindgren wrote: > > This is a brilliant idea. I don't know why we haven't thought about > > combining the open graphics project in the ASIC. Let's discuss this > > some more and see if we could come up with a practical solution. > > Note that Timothy's reply is from his viewpoint of ongoing research > within the project. > > > The project produced a working framebuffer hardware, the OGD1, more > than two years ago: > > http://www.traversaltech.com/products.html > http://wiki.opengraphics.org/tiki-index.php?page=OGD1 > http://www.linuxfund.org/projects/ogd1/ > > > I would suggest to make use of the OGD1 design in an opencores ASIC, > until the project has made further progress on the GPU side that > Timothy described. I think doing so would generate much interest, > and ultimately perhaps more contributors. Yay! > > > > I have read about the open graphics project in the past, but I'm a > > bit out of the loop, so here's a few newbie questions: > > > > 1. Do you need dedicated RAM, and in that case, which size and bandwidth? > > OGD1 has 256 MiB DDR400 clocked at 200MHz. > > > 2. How many gates is the current design? > > Dunno how much of the XC3S4000 is used. Part of the XP10 would also > be needed. Besides the PCI interface it does some bit mangling IIRC. > > > 3. Is it in a state that could be targeting an ASIC right now, or do > > you need more functionality and verification? > > The OGD1 works. > > > 4. We are not sure yet if we will be targeting an ASIC with gigabit > > transceivers. Would that be a requirement? > > I guess no? > > > //Peter > _______________________________________________ > Open-graphics mailing list > [email protected] > http://lists.duskglow.com/mailman/listinfo/open-graphics > List service provided by Duskglow Consulting, LLC (www.duskglow.com) > -- Timothy Normand Miller, PhD Assistant Professor of Computer Science, Binghamton University http://www.cs.binghamton.edu/~millerti/<http://www.cse.ohio-state.edu/~millerti> Open Graphics Project
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