On Thu, Jan 28, 2010 at 10:16:24AM -0600, Mike Christie wrote:
> On 01/28/2010 06:36 AM, Pasi Kärkkäinen wrote:
>> Hello list,
>> Please check these news items:
>> http://blog.fosketts.net/2010/01/14/microsoft-intel-push-million-iscsi-iops/
>> http://communities.intel.com/community/openportit/server/blog/2010/01/19/1000000-iops-with-iscsi--thats-not-a-typo
>> http://www.infostor.com/index/blogs_new/dave_simpson_storage/blogs/infostor/dave_simpon_storage/post987_37501094375591341.html
>> "1,030,000 IOPS over a single 10 Gb Ethernet link"
>> "Specifically, Intel and Microsoft clocked 1,030,000 IOPS (with 512-byte 
>> blocks),
> Did it look like they were using ioat? I think for Windows they support  
> iscsi and ioat, right?

Hmm.. let's see: 

Performance factors:

        - iSCSI initiator perf optimizations
        - Network stack optimizations
        - Receive Side Scaling (RSS)
        - Intel Xeon 5500 QPI and integrated memory controller
        - Intel 82599: HW Acceleration, multi-core scaling with RSS, MSI-X

iSCSI and Storage Enhancements in (Windows 2008) R2:

        - iSCSI Multi-Core and Numa IO
        - DPC redirection
        - Dynamic Load Balancing
        - Storage IO monitoring
        - CRC Digest Offload
        - Support for 32 paths at boot time

Intel Xeon 5500 Processor Series, Shatters previous iSCSI performance

        Architecture increases I/O Bandwidth and CPU efficiency
        - New memory subsystem
        - Intel Quickpath Interconnect
        - New I/O subsystem w/ PCIe Gen2 and CRC32-C instruction set

Intel Ethernet Adapters, Elements of iSCSI connectivity


        3. Performance
        - Transport HW off-loads: Ethernet, TCP/IP and IPSEC
        - Multi-Core I/O scaling integrated with Windows Server
        - Intel VMDQ: VM mapping off-load with Hyper-V
        - Intel Xeon Processor 5500 iSCSI CRC digest instruction set

Intel Ethernet iSCSI Acceleration

        1. Largest portion of storage I/O host processing is in the application 
& SCSI layers. 
           No off-load possible.
        2. Integrated initiator compute insignificant at run time.
           CPU CRC computation offers maximum data protection. CRC instruction 
        3. Header created in SW, Segmentation and checksum off-loaded.
           Transport Off-load.
        4. I/O mapped to cores via classes and queues.
           Mapping off-load.
        5. Transport layer: LRO, LSO, Cksum Rx/Tx, RSS, IPSEC HW Off-load.
           Transport off-load.

So yeah.. no idea if those are IOAT or not.

-- Pasi

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