hi all: Except previous ITR instruction will be executed before DCC changes to fast mode.
from the spec it says "If the issued instruction writes to DBGDTRTXint, the instruction does not affect the value returned from this read of DBGDTRTXext. That is, this instruction can write the next DBGDTRTXext value to be read." so I think we should add a dummy read after we change the DCC as FAST mode. thanks for your help in advance, > + retval += > mem_ap_sel_write_atomic_u32(swjdp,armv7a->debug_ap,armv7a->debug_base > + CPUDBG_DSCR,dscr); > + retval += > mem_ap_sel_write_atomic_u32(swjdp,armv7a->debug_ap,armv7a->debug_base > + CPUDBG_ITR,ARMV4_5_LDC(0, 1, 0, 1, 14, 5, 0, 4)); + /* dummy read DTRTX for triggerring IRT command we just fill in */ + retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap, + armv7a->debug_base + CPUDBG_DTRTX, &tmp); + ------------------------------------------------------------------------------ Want excitement? Manually upgrade your production database. When you want reliability, choose Perforce Perforce version control. Predictably reliable. http://pubads.g.doubleclick.net/gampad/clk?id=157508191&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
