On 14/07/2023 00:30, Tomas Vanek wrote:
Unfortunately (if I'm not completely wrong guessing the mechanism of
the errata) each rogue break also means that
one semihosting operation gets skipped. So your test will keep
running, time to time some semihosted output get lost.
T
Not really! The semihosting operation or any other BKPT is executed
again after return from the interrupt!
The code reliably replicating the issue on STM32F767 without semihosting
is as simple as that:
#include "stm32f7xx_hal.h"
int pendsv_cnt, loop_cnt;
void PendSV_Handler(void)
{
pendsv_cnt++; }
int main(void)
{
while (1) {
SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; // you may insert 0..8 __NOP()
instructions as a delay here // no issue observed with a delay longer
than 8 __NOP() instructions
__BKPT(0); loop_cnt++; } }
// empty SystemInit to keep STM startup_stm32f767xx.s happy
void SystemInit(void)
{
}
The code running under OpenOCD/gdb stops first in PendSV_Handler() and
then correctly at __BKPT(0) location. OpenOCD setting cortex_m interrupt
mask on suppresses interrupts and no surprise that rogue breaks in
PendSV_Handler() disappear as well. T
