Hi, I am looking to updating the OpenOCD flash drivers for Infineon PSoC6 and syncing with the latest Infineon branch.
I have an issue with chip SRST reset which seems to work differently on several adapters (CMSIS-DAP / KitProg / JLink). For the cases where the CPU is in sleep, a SRST reset is needed before programming (to take the CPU out of sleep). I looked through the reset_config command but there doesn’t seem to be a simple command which issues as SRST pulse before programming. The command ‘reset_config connect_assert_srst srst_gates_jtag’ seems to work differently on each device. Is it possible to add a SRST pulse before init without the need of a custom reset handler (I guess this is mandatory for devices in Sleep mode)? Thanks, Rolf
