>
> Tested-by: Dirk Behme <[email protected]>
Hi Dirk,
Thanks for your feedback.
>
> Please apply.
>
>> Also, the programming breakpoints works as well.
>
> Could you give some examples how you use this? Giving some logs of how
> you are testing would help other to reproduce this ;)
The following is my log of setting up a breakpoint:
Telnet session
-----------------------------------------------------------------------
m...@matt-abacus:~$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> omap3_dbginit
Tap/Device does not have IDCODE
JTAG tap: omap3530.jrc got: 0x00000000 (mfg: 0x000, part:
0x0000, ver: 0x0)
JTAG tap: omap3530.jrc expected 1 of 1: 0x0b7ae02f (mfg: 0x017, part:
0xb7ae, ver: 0x0)
trying to validate configured JTAG chain anyway...
AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar 0x54011080
SWJ-DP STICKY ERROR
Read MEM_AP_CSW 0x80000042, MEM_AP_TAR 0x54011080
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* omap3.cpu cortex_a8 little omap3530.dap unknown
0x54011314 00000003 ....
0x54011314 00000001 ....
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
spsr_svc: 0xa00001d3 pc: 0x80e88340
MMU: disabled, D-Cache: disabled, I-Cache: enabled
> step
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
spsr_svc: 0xa00001d3 pc: 0x80e88344
MMU: disabled, D-Cache: disabled, I-Cache: enabled
> step
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
spsr_svc: 0xa00001d3 pc: 0x80e88348
MMU: disabled, D-Cache: disabled, I-Cache: enabled
> step
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
spsr_svc: 0xa00001d3 pc: 0x80e88508
MMU: disabled, D-Cache: disabled, I-Cache: enabled
> bp 0x80e88348 4 hw
breakpoint set at 0x80e88348
> resume
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
spsr_svc: 0xa00001d3 pc: 0x80e88348
MMU: disabled, D-Cache: disabled, I-Cache: enabled
>
The application running on the target is uboot.
As above log you see, the breakpoint is allocated in 0x80e88348.
After resuming,
the target is halted since the breakpoint.
And I believe this should be somewhere of idle loop in uboot.
In addition, I also added debug msg to dump the changes of DSCR. It
looks like
Debug: 251 8650 cortex_a8.c:362 cortex_a8_poll(): DSCR 0x030f6003
..........................
/* after setup breakpoint */
Debug: 605 21645 cortex_a8.c:362 cortex_a8_poll(): DSCR 0x030f6007
The entry field indicates the breakpoint occurred.
Cheers,
Matt
>
> Many thanks
>
> Dirk
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