Matt Hsu wrote:
> Hi all,
>
> This series patches fix the hardware single-step logic mainly.
> With these patches, you can do the step operation on the telnet session.
> Also, the programming breakpoints works as well.
> Cheers,
> Matt
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Hi Matt,

It makes me very happy to se active work with this code.
 
The bit offset handling is very nice, patches 0001 and 0003.

The second patch is more worth thinking about.

For the Omap353x we set the  DSCR[DSCR_HALT_DBG_MODE] bit in the setup 
script, and we then assume that the running application does not 
actively play with the debug settings.
This can of course be discussed.

Anyway, if we want to set this bit every time we call halt, a small 
extra cost in USB return trips, then I think the logical place is before 
we try to halt the core by writing to bit 0 of DRCR.

I cannot really se how this patch modifies single stepping or breakpoint 
handling, can you describe that. It would be helpful with some 
descriptions of how  and when problems occured that you are solving with 
your patches.

Best regards,
Magnus


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