Matt Hsu wrote: > >>> >>> >> Hi Matt, >> >> It makes me very happy to se active work with this code. > Hi Magnus, > > It's all based on you guys great work. :) > I'm just standing on the shoulders of giants. (stealing from > Holger's blog: > http://zecke.blogspot.com/2009/08/standing-on-shoulders-of-giants-fixing.html) > > > >> >> >> I cannot really se how this patch modifies single stepping or >> breakpoint handling, can you describe that. > My thoughts on single stepping is, it's an sort of debug event. > > And the section 12.2.1 tells us: > /When the processor debug unit is in Halting debug-mode, it will > halts as a debug event occurs./ > So I observed the DSCR register and think its corresponding value > is suspicious. > Why its halt debug mode bit is disable? > > Once I enable this bit, everything becomes what I expected. > Most obvious part is the entry field bit DSCR[5:2], it indicates > the debug event correctly. > > Cheers, > Matt Yes, in this way it does affect single-stepping and breakpoints. But since it affects ALL debugging and it does not touch the specific logic for single stepping or breakpoints I think the patch should be renamed to "enable-debug-halting-mode".
Regards, Magnus _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
