> If I set to 20khz, I get perfect debugging no errors .. I have found that the JTAG clock needs to be *really* low when the system is running off an RC oscillator. Once on a PLL, you can crank up the speed. This was observed on an LPC1768, but also one other system I fail to recall which...
RCLK is implemented on some systems that have RC oscillators, but here I've found the RCLK frequency to be unreliable. Why this would be, I have no idea... -- Øyvind Harboe US toll free 1-866-980-3434 / International +47 51 63 25 00 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
