On 01/30/2012 12:22 AM, Ouabache Designworks wrote:
What would it default to on power on reset?
It would default to 0 on reset in order to be backwards compatible.
Software should be able to test for its availability by writing, read back and
verify that
the wanted value has been written.
Can we pass that value in with a parameter?
That would be highly implementation specific of course.
(I assume you are speaking about verilog parameters?)
But since I would like to propose it to default to 0,
the answer is naturally: no ;)
Can we alter it via a configuration pin? For example a debug mode in could
select between mission mode vectors or debugger.
I don't think that might be necessary to specify in the arch spec,
with the SPR in place it would be easy to implement such a feature in software
(i.e. read in pin and update the exception vector base address accordingly).
And if you really want it to be a hardware feature,
there is nothing in the arch spec stating that SPRs are forbidden to be
modified by
an external source (the debug unit is a good example of a case where it happens)
Stefan
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