2012/4/18 Julius Baxter <[email protected]> > > If you think getting rid of so many warnings is worth it, we can get > started > > now. For example, I'm getting this warning for the OpenRISC core > included in > > ORPSoC2: > > > > %Warning-DECLFILENAME: > rtl/verilog/or1200/or1200_fpu_intfloat_conv.v:323: > > Filename 'or1200_fpu_intfloat_conv' does not match MODULE name: > > or1200_fpu_intfloat_conv_except > > > > Could you move module 'or1200_fpu_intfloat_conv_except' to a new file > called > > 'or1200_fpu_intfloat_conv_except'? I've tried that locally and it works. > > Alternatively, that module could be defined as a submodule of the main > one, > > but that's only available for SystemVerilog (2005). Do we need to support > > older Verilog standards? > > Hi Ruben > > This fix has been applied. > > Thanks again > > Julius > _______________________________________________ > OpenRISC mailing list > [email protected] > http://lists.openrisc.net/listinfo/openrisc >
I don't think that was a very good idea. There might be scripts that points out the old filename. Getting rid of warnings is good, but this might break stuff. This patch was one of the reasons that I think we should put out a proper release before we change more things. -- Olof Kindgren ______________________________________________ ORSoC Website: www.orsoc.se Email: [email protected] ______________________________________________ FPGA, ASIC, DSP - embedded SoC design
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