> So I've been working on a variation of OpenRISC that doesn't
> have a branch delay slot.
I would welcome getting rid of the delay slot.
It is counterintuitive when you write assembly code by hand. It adds
complication to the toolchain. We recently fixed a CPU core bug in that
area that's been there for years. It makes you think about interesting
questions like "will a breakpoint in the delay slot work?".
Let's make it optional in the spec and be done with it.
Compatibility with old CPU cores can be easily achieved with a flag in
GCC that adds an l.nop after every jump. The GNU assembler could also
optionally inject an l.nop automatically after every jump. Maybe only
the assembler needs the flag, as I think that GCC starts the assembler
every time anyway.
Regards,
rdiez
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