On Fri, Sep 28, 2012 at 4:57 PM, Matthew Hicks <[email protected]> wrote: > For a non-pipelined multiplier, using the Verilog multiply operator > will produce the best results across a variety of FPGAs.
But in order to detect overflow properly you'll have to do the multiplication to the full 64 bits. -Pete _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
