2012/10/17 R. Diez <[email protected]>: > > >> [...] > >> Yes, I'm working on this right now. That links to the mux part (1 >> master, multiple slaves). I still need to do some verification on the >> arbiter part (multiple masters, one slave) before I check it in. The >> watchdog stuff is stolen from Julius' orpsocv2 implementation, so that >> should reply with an error after a timeout for invalid addresses > > I haven't had the time to look at it yet, but I thought I'd ask nevertheless: > why is a timeout necessary? Calculating timeouts tends to be a difficult > affair. > > At least in the ORPSoC/MinSoC Wishbone switch, every slave is associated to > an address prefix. If a certain address is not covered by any slave, the > switch should error straight away, shouldn't it? > > Thanks, > rdiez
That sounds like a good idea for addresses that the switch know is invalid. Right now the address decoding logic is made as small as possible, which means that we assign very large address segments to most slaves, so large chunks of the memory is considered valid even though there are no slaves mapped there. We also still need a watchdog for slaves that behave badly. -- Olof Kindgren ______________________________________________ ORSoC Website: www.orsoc.se Email: [email protected] ______________________________________________ FPGA, ASIC, DSP - embedded SoC design _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
