On Tue, Jul 16, 2013 at 10:32 AM, Stefan Wallentowitz <[email protected]> wrote: > On 07/16/2013 04:56 AM, Stefan Kristiansson wrote: >> For > 2-way caches, things get a bit more complicated, so to implement >> 4-way caches, you either have to bite the bullet and implement LRU for it >> or use some simpler replacement algorithm (like round-robin, > > The LRU for 4 way is actually also not very complicated using the following > trick: > > You need a six bit vector, with bits of the form (x>y) meaning way x is > older than way y > For four way this gives you (0>1), (0>2), (0>3), (1>2), (1>3), (2>3) > > The rest is relatively simple logic: > assign way_lru[0] = !lru[0] & !lru[1] & !lru[2] > assign way_lru[1] = lru[0] & !lru[3] & !lru[4] > assign way_lru[2] = lru[1] & lru[3] & !lru[5] > assign way_lru[3] = lru[2] & lru[4] & lru[5] > > Credits for this go to my former student Robert Specht, but I think this is > based on some common methods. >
That is indeed a neat trick. > As said in the other mail, we varied the mor1kx cache to implement this. I > will put it online asap. Looking forward to it! Stefan _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
