On Tue, Sep 30, 2014 at 3:31 PM, jurand <[email protected]> wrote: > I will try to explain again my problem. > 1. vmlinux.bin loaded into ram (bin2vmem)
Ok, that sounds right. > 2. Processor is reading from addresses 0x100-0x118, high addresses like > 0x17E000, C00FE948, 0x42088, C01401A8, which according to Your replies is > probably correct. The addresses aren't necessarily going to say us much, since they are specific to your kernel build (except for exception vectors and such of course) > 2. I see nothing on uart console. Processor doesn't write to uart16550_0, > its address 0x9000000 does not appear on wishbone bus. > This isn't much to go on, information about what it *does* would be more helpful. > Maybe there is something wrong in dts, or bootargs? Do i have to edit > initramfs.devnodes and add nod to /dev/ttyS0? > > I enclose > .config <http://openrisc.2316802.n4.nabble.com/file/n4642100/.config> > - from kernel building > simple.dts <http://openrisc.2316802.n4.nabble.com/file/n4642100/simple.dts> > - used device tree This is maybe where the problem is, you have defined a memory of 128MB, do you really have that much memory in your simulation? > sim.log <http://openrisc.2316802.n4.nabble.com/file/n4642100/sim.log> > - log from simulation using or32-elf-sim > A note not related to your problem, have you considered moving away from or1200 and use mor1kx instead? I would recommend that at least, and also to use fusesoc/orpsoc-cores instead of the deprecated old orpsoc. https://github.com/olofk/fusesoc https://github.com/openrisc/orpsoc-cores There's simulation environments for both or1200 and mor1kx available there. Stefan _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
