>From Apple's hardware developer info:

Second-Level Cache
All the new models except the lowest-priced Power Macintosh 7200 models
include a second-level (L2) cache. The L2 cache provides up to 40% better
performance.  The L2 cache in the Power Macintosh 9500/150 consists of 512
KB of fast static RAM.

The size of the cache in the other models is 256 KB. Table 1-2 on page 4
shows the cache size for each model.

The second-level (L2) cache in the Power Macintosh 7500 and 8500 computers
occupies a single SIMM. The size of the L2 cache SIMM can be 256 KB, 512 KB,
1 MB, or 4 MB. The cache data store is implemented with synchronous burst
static RAM devices; the cache tag store is implemented with standard static
RAM devices. The synchronous burst SRAM devices in the cache data store must
have an access time of 11 ns or less.

Note
The same L2 cache SIMM is used in both the Power Macintosh 7500 and
the Power Macintosh 8500, but with some differences in operation, as
specified in the next section.

By using the DBDIS (data bus disable) signal defined for the PowerPC 604,
the cache controller is able to assert DBG in the same cycle that TS
asserts, so the processor can accept data (DBB) in the very next cycle.
With the PowerPC 604, data is made available, that is, the TA (transfer
acknowledge) signal is asserted, in the next clock cycle after the assertion
of TS (transfer start). With the PowerPC 601, data is made available as
early as the second clock cycle after the assertion of TS.

Joe

> From: JGE <[EMAIL PROTECTED]>
> Does anyone know what are the different L2 cache's that were available for
> the 7500? I have an Apple 200MHz chip in mine (604?) and was wondering
> about an L2 cache for it................. I've
> seen a 256k cache on ebay but I thought there was a 1024k one as well.
> What are the effects of the respective sizes and likely costs?
> 


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