This patch updates the event table for AMD Family 10h RevD (Istanbul)
cpus.
Signed-off-by: Robert Richter <robert.rich...@amd.com>
---
lib/amd64_events_fam10h.h | 173 ++++++++++++++++++++++++++++++++++++++++++++-
lib/pfmlib_amd64_priv.h | 2 +-
2 files changed, 171 insertions(+), 4 deletions(-)
diff --git a/lib/amd64_events_fam10h.h b/lib/amd64_events_fam10h.h
index 587fdc3..ed9dd07 100644
--- a/lib/amd64_events_fam10h.h
+++ b/lib/amd64_events_fam10h.h
@@ -27,6 +27,10 @@
*
* Feb 06 2009 -- Robert Richter, robert.rich...@amd.com:
*
+ * Update for Family 10h RevD (Istanbul) from: BIOS and Kernel
+ * Developerâs Guide (BKDG) For AMD Family 10h Processors, 31116 Rev
+ * 3.20 - February 04, 2009
+ *
* Update for Family 10h RevC (Shanghai) from: BIOS and Kernel
* Developerâs Guide (BKDG) For AMD Family 10h Processors, 31116 Rev
* 3.20 - February 04, 2009
@@ -1998,7 +2002,7 @@ static pme_amd64_entry_t amd64_fam10h_pe[]={
/* 110 */{.pme_name = "READ_REQUEST_TO_L3_CACHE",
.pme_code = 0x4E0,
.pme_desc = "Read Request to L3 Cache",
- .pme_flags = PFMLIB_AMD64_UMASK_COMBO,
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_TILL_FAM10H_REV_C,
.pme_numasks = 8,
.pme_umasks = {
{ .pme_uname = "READ_BLOCK_EXCLUSIVE",
@@ -2038,7 +2042,7 @@ static pme_amd64_entry_t amd64_fam10h_pe[]={
/* 111 */{.pme_name = "L3_CACHE_MISSES",
.pme_code = 0x4E1,
.pme_desc = "L3 Cache Misses",
- .pme_flags = PFMLIB_AMD64_UMASK_COMBO,
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_TILL_FAM10H_REV_C,
.pme_numasks = 8,
.pme_umasks = {
{ .pme_uname = "READ_BLOCK_EXCLUSIVE",
@@ -2078,7 +2082,7 @@ static pme_amd64_entry_t amd64_fam10h_pe[]={
/* 112 */{.pme_name = "L3_FILLS_CAUSED_BY_L2_EVICTIONS",
.pme_code = 0x4E2,
.pme_desc = "L3 Fills caused by L2 Evictions",
- .pme_flags = PFMLIB_AMD64_UMASK_COMBO,
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_TILL_FAM10H_REV_C,
.pme_numasks = 9,
.pme_umasks = {
{ .pme_uname = "SHARED",
@@ -2218,6 +2222,169 @@ static pme_amd64_entry_t amd64_fam10h_pe[]={
.pme_desc = "MFENCE Instructions Retired",
.pme_flags = PFMLIB_AMD64_FAM10H_REV_C,
},
+
+/* Family 10h RevD, Istanbul */
+
+/* 120 */{.pme_name = "READ_REQUEST_TO_L3_CACHE",
+ .pme_code = 0x4E0,
+ .pme_desc = "Read Request to L3 Cache",
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_FAM10H_REV_D,
+ .pme_numasks = 11,
+ .pme_umasks = {
+ { .pme_uname = "READ_BLOCK_EXCLUSIVE",
+ .pme_udesc = "Read Block Exclusive (Data cache read)",
+ .pme_ucode = 0x01,
+ },
+ { .pme_uname = "READ_BLOCK_SHARED",
+ .pme_udesc = "Read Block Shared (Instruction cache read)",
+ .pme_ucode = 0x02,
+ },
+ { .pme_uname = "READ_BLOCK_MODIFY",
+ .pme_udesc = "Read Block Modify",
+ .pme_ucode = 0x04,
+ },
+ { .pme_uname = "CORE_0_SELECT",
+ .pme_udesc = "Core 0 Select",
+ .pme_ucode = 0x00,
+ },
+ { .pme_uname = "CORE_1_SELECT",
+ .pme_udesc = "Core 1 Select",
+ .pme_ucode = 0x10,
+ },
+ { .pme_uname = "CORE_2_SELECT",
+ .pme_udesc = "Core 2 Select",
+ .pme_ucode = 0x20,
+ },
+ { .pme_uname = "CORE_3_SELECT",
+ .pme_udesc = "Core 3 Select",
+ .pme_ucode = 0x30,
+ },
+ { .pme_uname = "CORE_4_SELECT",
+ .pme_udesc = "Core 4 Select",
+ .pme_ucode = 0x40,
+ },
+ { .pme_uname = "CORE_5_SELECT",
+ .pme_udesc = "Core 5 Select",
+ .pme_ucode = 0x50,
+ },
+ { .pme_uname = "ANY_CORE",
+ .pme_udesc = "Any core",
+ .pme_ucode = 0xF0,
+ },
+ { .pme_uname = "ALL",
+ .pme_udesc = "All sub-events selected",
+ .pme_ucode = 0xF7,
+ },
+ },
+ },
+/* 121 */{.pme_name = "L3_CACHE_MISSES",
+ .pme_code = 0x4E1,
+ .pme_desc = "L3 Cache Misses",
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_FAM10H_REV_D,
+ .pme_numasks = 11,
+ .pme_umasks = {
+ { .pme_uname = "READ_BLOCK_EXCLUSIVE",
+ .pme_udesc = "Read Block Exclusive (Data cache read)",
+ .pme_ucode = 0x01,
+ },
+ { .pme_uname = "READ_BLOCK_SHARED",
+ .pme_udesc = "Read Block Shared (Instruction cache read)",
+ .pme_ucode = 0x02,
+ },
+ { .pme_uname = "READ_BLOCK_MODIFY",
+ .pme_udesc = "Read Block Modify",
+ .pme_ucode = 0x04,
+ },
+ { .pme_uname = "CORE_0_SELECT",
+ .pme_udesc = "Core 0 Select",
+ .pme_ucode = 0x00,
+ },
+ { .pme_uname = "CORE_1_SELECT",
+ .pme_udesc = "Core 1 Select",
+ .pme_ucode = 0x10,
+ },
+ { .pme_uname = "CORE_2_SELECT",
+ .pme_udesc = "Core 2 Select",
+ .pme_ucode = 0x20,
+ },
+ { .pme_uname = "CORE_3_SELECT",
+ .pme_udesc = "Core 3 Select",
+ .pme_ucode = 0x30,
+ },
+ { .pme_uname = "CORE_4_SELECT",
+ .pme_udesc = "Core 4 Select",
+ .pme_ucode = 0x40,
+ },
+ { .pme_uname = "CORE_5_SELECT",
+ .pme_udesc = "Core 5 Select",
+ .pme_ucode = 0x50,
+ },
+ { .pme_uname = "ANY_CORE",
+ .pme_udesc = "Any core",
+ .pme_ucode = 0xF0,
+ },
+ { .pme_uname = "ALL",
+ .pme_udesc = "All sub-events selected",
+ .pme_ucode = 0xF7,
+ },
+ },
+ },
+/* 122 */{.pme_name = "L3_FILLS_CAUSED_BY_L2_EVICTIONS",
+ .pme_code = 0x4E2,
+ .pme_desc = "L3 Fills caused by L2 Evictions",
+ .pme_flags = PFMLIB_AMD64_UMASK_COMBO | PFMLIB_AMD64_FAM10H_REV_D,
+ .pme_numasks = 12,
+ .pme_umasks = {
+ { .pme_uname = "SHARED",
+ .pme_udesc = "Shared",
+ .pme_ucode = 0x01,
+ },
+ { .pme_uname = "EXCLUSIVE",
+ .pme_udesc = "Exclusive",
+ .pme_ucode = 0x02,
+ },
+ { .pme_uname = "OWNED",
+ .pme_udesc = "Owned",
+ .pme_ucode = 0x04,
+ },
+ { .pme_uname = "MODIFIED",
+ .pme_udesc = "Modified",
+ .pme_ucode = 0x08,
+ },
+ { .pme_uname = "CORE_0_SELECT",
+ .pme_udesc = "Core 0 Select",
+ .pme_ucode = 0x00,
+ },
+ { .pme_uname = "CORE_1_SELECT",
+ .pme_udesc = "Core 1 Select",
+ .pme_ucode = 0x10,
+ },
+ { .pme_uname = "CORE_2_SELECT",
+ .pme_udesc = "Core 2 Select",
+ .pme_ucode = 0x20,
+ },
+ { .pme_uname = "CORE_3_SELECT",
+ .pme_udesc = "Core 3 Select",
+ .pme_ucode = 0x30,
+ },
+ { .pme_uname = "CORE_4_SELECT",
+ .pme_udesc = "Core 4 Select",
+ .pme_ucode = 0x40,
+ },
+ { .pme_uname = "CORE_5_SELECT",
+ .pme_udesc = "Core 5 Select",
+ .pme_ucode = 0x50,
+ },
+ { .pme_uname = "ANY_CORE",
+ .pme_udesc = "Any core",
+ .pme_ucode = 0xF0,
+ },
+ { .pme_uname = "ALL",
+ .pme_udesc = "All sub-events selected",
+ .pme_ucode = 0xFF,
+ },
+ },
+ },
};
#define PME_AMD64_FAM10H_EVENT_COUNT
(sizeof(amd64_fam10h_pe)/sizeof(pme_amd64_entry_t))
diff --git a/lib/pfmlib_amd64_priv.h b/lib/pfmlib_amd64_priv.h
index 661ca58..9f7538a 100644
--- a/lib/pfmlib_amd64_priv.h
+++ b/lib/pfmlib_amd64_priv.h
@@ -36,7 +36,7 @@
#define PMU_AMD64_IBSOPCTL_PMC 5 /* IBS: op PMC base */
#define PMU_AMD64_IBSOPCTL_PMD 7 /* IBS: op PMD base */
-#define PFMLIB_AMD64_MAX_UMASK 9
+#define PFMLIB_AMD64_MAX_UMASK 12
typedef struct {
char *pme_uname; /* unit mask name */
--
1.6.1.2
------------------------------------------------------------------------------
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