Will, On Thu, May 17, 2007 at 09:27:16AM -0400, William Cohen wrote: > > A graduate student at NCSU, Jesse Beu, has used the PEBS registers to do > this type of sampling on P4 based processors running a perfmon2 kernel. His > master's thesis describes how this was accomplished. The main problem is > the PEBS hardware doesn't directly give address information; it give > processor state information. Computing the address from the state > information is possible, but non-trivial. > > I don't think that AMD Opterons have hardware that allows that. The AMD > Family 10 processors are suppose to have some type of sampling mechanism to > allow collection of memory reference addresses. > > > Another possible suggestion is to make use of the TLB hardware and mark > pages as unreadable and then have the trap hander do some data collection. > Yes, I agree with this technique. But you probably need some kernel support to make this fast.
-- -Stephane _______________________________________________ perfmon mailing list [email protected] http://www.hpl.hp.com/hosted/linux/mail-archives/perfmon/
