Leopold Toetsch wrote:
+-----+----------------------+
| ctp | interpreter state |
+-----+----------------------+
|
+------------+
|
+------+-----+-----------+----------------------+
| prev | ctx | lexicals | volatiles |
+------+-----+-----------+----------------------+
| p a r r o t r e g i s t e r s |
A very strong architecture for sure.
> + no lexical fetch overhead
That alone is worth the price of admission. No register allocator
needed because the HLL only needs volatiles for anonymous temporaries
which are easily allocated during expression parsing.
I would make a couple changes:
+-----+----------------------+
| ctp | interpreter state |
+-----+----------------------+
|
+--------------+------+-----+-----------+----------------------+
| caller's out | prev | ctx | lexicals | volatiles |
+--------------+------+-----+-----------+----------------------+
Merge with the variable sized stack frame proposal and expose
prev+ctx as registers. As long as an architecture change is on the
table, might as well make it a doozy. (Caller's out may need to be
padded if caller did not pass the right number of args.)
Sorry for the de-lurk. I'll now return to hacking on my storage to
storage VM which looks amazingly similar to Leo's VM. ;)
- Ken
