At 12:21 PM 2/27/01 -0700, Gordon Price wrote:
>Hi Everyone,
>         I thought I was paying close attention to all the chatter on this
>net but apparently I have missed the boat again. I have a master schematic
>and 4 (flat) sub schematics that globally reference the following net names
>I have defined:(using 99SE SP6)

Ordinarily these would be global nets, unless they were defined using net 
labels. If net labels were used, then connectivity will depend on the scope 
settings at the time of netlist or update generation. The net names might 
also vary; in fact, this is necessary if net connectivity is to be 
sheet-by-sheet instead of being global.

>         When I go to update the PCB from the schematic, I get a macro error
>that asks me if I want to continue.(Right here is where I would like to know
>what the complaints are but I can't seem to find an error report)

An answer was already given. However, it is also possible to generate a net 
list and import the net list into the PCB instead of using the synchronizer 
(Update PCB) route. The net list method has the advantage that you can 
actually examine each net. But the macro error messages are usually 
sufficient, once you know how to interpret them.

>  If I
>continue I find that even though I don't see any missing parts or
>footprints, that when I route the board, the ground and power planes that I
>created in the layer stack manager do not connect up, but rather, ground
>pins are connected by signal traces rather than to the planes.

The ground and power planes must be assigned the correct names in the 
stackup manager. It's not automatic.

>         The online help seems to talk about different conditions than what I
>see on my dialogue boxes. When I try to edit the properties of the internal
>power planes, the drop down box does not show the +3.3V net name or anything
>for the power ground net GND.

Right. Clearly, those net names are not in the net list. You can verify 
this with the Netlist Manager. It might be appropriate here to generate a 
net list from the schematic instead of bypassing this step with the 

>         Obviously, the macro errors at update time are the problem, but I
>don't know how to view the errors or see what is really wrong. I have set up
>my design rules and the board will route 100% and all the parts seem to ALL
>be there.
>         I know Protel has it's own power and ground rules but I have not
>made sense of them yet. I have set the net name on the power ground symbol
>to "GND" and have used the power arrow symbol with the above net names.

So it should work. However, there could be other problems. For example, the 
target PCB might be set to another file. You are running update, okay, but 
the wrong file is being updated. If you go the netlist route, each step 
will be specific. If you have a net list with "GND" in it and you load that 
list, and GND does not appear in the list of loaded nets, call Ghostbusters.

>         One thing I have done is put power and ground pins on my schematic
>library parts so I can see them on the schematic. I then place a net label
>on a wire going to the power pin.

The plot thickens. This is a hierarchical schematic and net labels are 
local.  Use power ports instead of net labels and they will retain the 
correct name. If you look in the net list, you will see that nets have been 
generated with modified forms of the name. It might be GND_1, for example.

Normally, one will only use power ports to create power connections. Don't 
use net labels unless you are involved in schematic re-use and VCC, for 
example, on one sheet is a different net than VCC on another sheet, and 
there are a bunch of hidden pins and you can't just change VCC to VCC1 or 
VCC2, etc.

>  I did not put a net label on the ground
>symbol other than the properties box when you add a ground to the actual

Get rid of those net labels and use power ports exclusively, unless you 
fall into the situation I described which would be the relatively unusual 

Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

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