I just copied a PCB, and used Paste Special and checked Keep Net Name and
Duplicate Designator.

I could see nowhere that this would cause an error on the PCB due to using
the same designator twice... just Broken Net errors.

There is an option in the preferences to Remove Duplicates... I have this
turned off... but I am unsure if this would effect panelizing in this
way.... I didn't check.

The only time I could see this being a problem is if you needed to update it
from some later schematic changes... then just go back to one single, update
it and check it... and paste it again when you are done.

Make sure the single version is completely checked before you make the
panels.  As long as you paste it the right way there should be no need to
check it for errors after copying.

----------------------------------------------------------------------
Colby Siemer                        ** Custom Battery Chargers
                                           ** Custom Power Supplies
PowerStream Technology       ** Custom UPS
140 S. Mountainway Drive      ** Custom DC/DC Converters
Orem Utah 84058                  ** Power management electronics for OEMs

http://www.PowerStream.com

----- Original Message -----
From: "Saddle" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Sunday, July 29, 2001 6:37 PM
Subject: Re: [PEDA] Duplicating pieces of a layout


> But what about if you just want to add the same design a couple of times
to
> a PCB Panel. IS there a way to turn off the _1 extensions and ignore the
> resulting same part name errors? This would be after doing all the checks
on
> the single instance version.
>
> Curious,
>
> Saddle (In the land of Oz)
> "Whatever happened to Edit and Plot? I remember them fondly."
>
>
> I am not sure if this is relevant to what you are trying to do
> specifically... But if I remember correctly the reference to Complex
> hierarchy in the manual actually refers to the way it worked in 98... I
> don't have my manual handy to check.
>
> Either way... if you haven't looked at this KB article you may want to
give
> it a glance.  It describes Complex hierarchy and the way the complex to
> simple function works in 99 and 99SE.
>
> http://www.protel.com/earticles/complex_hier_P99.htm
>
> Regards,
> ----------------------------------------------------------------------
> Colby Siemer                        ** Custom Battery Chargers
>                                            ** Custom Power Supplies
> PowerStream Technology       ** Custom UPS
> 140 S. Mountainway Drive      ** Custom DC/DC Converters
> Orem Utah 84058                  ** Power management electronics for OEMs
>
> http://www.PowerStream.com
>
>
> ----- Original Message -----
> From: "Tim Hutcheson" <[EMAIL PROTECTED]>
> To: "Protel EDA Forum" <[EMAIL PROTECTED]>
> Sent: Friday, July 27, 2001 10:55 AM
> Subject: Re: [PEDA] Duplicating pieces of a layout
>
>
> > Thanks Colby.  I'll try to follow that through as time goes by today.
> Right
> > now, I'm testing all that I can about multi-sheet and in particular the
> > "complex" hierarchy method described in my manual.  But not having any
> luck
> > so far as the Create Netlist method doesn't seem to create the second
cpu
> in
> > the .net file yet. :o(  Just a matter of time...and time...and time.
> >
> > regards,
> >
> > Tim Hutcheson
> > Institute for Human and Machine Cognition
> > 40 S. Alcaniz St.
> > Pensacola, FL  32503
> > [EMAIL PROTECTED]
> > ICQ# 32491889
> >
> >
>

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