Protel EDA forum members,

In a P99SE design currently being wrapped up, we have a DRC error that is
something we want to do that generates an error we would like to not get
flagged. It would be good to set a very specific design rule to remove this
error, but I want to keep from having this new rule disquise any other real
errors we need to correct. Our biggest concern in overlooking this desired
if it is flagged is we may also miss real DRC errors buried somewhere in the

Here's the scenario:

In BGAs we have in this design, several pads are not used and therefore
have any assigned netnames. We want access to them due to this being an
prototype design and so we have vias associated with the pads to provide
to them even though they are currently unused. In the debug stage, we may
to make use of them and this provides that access if necessary. Of course,
everything associated with the unused pads is flagged as a DRC error. My
would be to set a design rule where anything associated with these unused
is not flagged, but everything else is to prevent missing any real DRC
errors in
this design.

I tend to think that with Protel's selection capabilities, there is some way
set this up. Being there are more experienced minds out here than mine with
Protel software, I wanted to pose this question and see if someone has a way
figured to do this selection and rule setup. I look forward to any and all
suggestions. Thanks in advance for your inputs and comments.

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