Greeitngs to all
I am laying out a pcb that will be 10 layers using standard thru-board vias and "micro-vias" laser drilled from layer 1 to 2 (and possibly from layer 10 to 9 for bypasses behind BGA/FPGA parts). This is the first time I'm doing it in Protel (I'm using 99se/sp6). I have defined my layers in the stack manager and assigned drill layers to the appropriate layer pairs. I need help setting up a via placement rule (or rules) to differentiate between the standard vias and the micro vias and rules that allow trace routing on the deeper internal layers that ignore the micro via placement. There are several BGA parts on this board so it's not a simple process to manually edit the vias and traces in those areas as I have done in the past. Any help in this area would be greatly appreciated. Thanks in advance! & Best Regards - Evan Scarborough www.e-cadds.com _________________________________________________________________ Get your FREE download of MSN Explorer at http://explorer.msn.com/intl.asp. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
