Hey Brian,

It just compiles CUPL afaik.

I've been working mostly in VHDL myself,  but I just did pick up what looks
to be a pretty good book (though I haven't read it yet) "Modeling, Synthesis
and Rapid Prototyping with the Verilog HDL", Michael D Ciletti, Prentice Hall
ISBN 0-13-977398-3.  It includes the student edition CD's for Xilinx
Foundation Express.

I think Xilinx Webpack ISE also supports Verilog input.  (It does
support VHDL input)

There is a usenet users group at comp.lang.verilog.

---Phil

BG> I was wondering if Protel's PLD package can handle Verilog source files &
BG> compile them.


BG> -----------------------------------------------------------------
BG> If anyone know of a Verilog discussion group, other than (Yahoo&Google
BG> groups) with a similar atmosphere to PEDA.  Please email me off list.

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