The biggest FPGA I'done is a 144 pin. Yes, it takes some work. It was a TQFP and I wanted the schematic to look like the footprint. I placed each pin by hand and named it according to the ALTERA naming: (TDI, TMS, GNDIO, VCCINT, GCLK1 .. ) but only after having them placed with increasing numbers as names. I have the numbers visible and only the changed names, not the number names.
The motivation to have the schematic equal to the footprint : When placing tracks to and from the FPGA I want a minimal amount of vias and crossings, so the process of assigning a wire on the schematic and assigning a pin in MaxPlus2 or Quartus is iterative. And having the footprint equal to the footprint supports that. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net Juha Pajunen wrote: > > Hi, > > I am making Altera 956 pin FPGA SCH component, assign > that many pin is annoying... why not there is component > wizard like PCB library editor has, at least I do not > know it...? > It would be nice to have a program that could read > pin-out information file > (Altera offers pin-out file, that is in TEXT format) > and "make" pins to SCH component! > > How do you do your huge pin SCH components? * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[email protected] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
