In a message dated 12/16/2002 2:30:48 PM Eastern Standard Time, 
[EMAIL PROTECTED] writes:


>     Last year, I had a run of 1000 PCB's (4 layer) where 80% initially 
> passed QC, then 90% of the pass PCBs failed after a few days
> of use.  After exhaustive investigation, I cut right through the PCB with a 
> huge pair of scissors.  It turned out the PCB's middle
> layers had around 25% the normal copper thickness & all the traces where 
> also around -4 mil in some areas.
> 
>     Are there any tricks, test patterns where I could easily determine the 
> following for a 16 layer PCB panel without having to
> slice up the panel:
> 
> 1) Alignment of each of the middle layers.
> 2) Vertical thickness of the copper on the middle layers.
> 3) Horizontal thickness of the traces on the middle layers.
> 4) Drill hole alignment for all of the layers.
> 
> 
> 

I usually build in a "test coupon" which has, among other things, a 
"staircase" built in the copper layers (remembering to build the steps in the 
plane layers in the negative, so you can see thru the dielectric if needed) 
so that I can verify stacking order, dielectric thickness, and so on, as well 
as the things you mentioned. You need to instruct the board house not to 
apply pullbacks between the copper and the edge in this area; easiest is to 
just be sure to apply your own pullbacks where needed and forbid them to add 
any. Now, if you can find a way to guarantee they actually READ your fab 
instructions, you'll really have something!

Steve Hendrix


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