I am running DXP and I want/need to create a footprint that has surface mount pads 
connected to vias by a short trace that won't cause a whole lot of DRC errors on my 

The footprint is for bypass caps placed on the component side of a multi-layer board.  
The vias take the cap terminals to the appropriate power or ground plane.  My 
company's boards are not that complex and I generally hand route them, so this would 
save me from having to run traces and placing vias for all the bypass caps.  I could 
also see this being useful for creating footprints that will accommodate both SMT and 
THT resistors and caps -- which I could have used more than once in the past when 

The problem that I run into is that in the process of generating the PCB from the 
schematic, the pad is correctly associated with its intended net, but neither the 
trace nor the via are associated with any net.  This leads to DRC clearance errors as 
I have effectively connected a No Net trace to a pad with a net.

Is there any way to setup the footprint or the schematic to PCB process so that the 
pad-trace-via combination are all added to the appropriate net?

Another possible solution that I toyed with was to have an elongated pad with the hole 
offset, but I can't find any way to have the hole placed anywhere but in the middle of 
the pad.  Is there a way to place the hole offset from the middle of the pad?



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