Leopold, Mark wrote:

Hi,

I am running DXP and I want/need to create a footprint that has surface mount pads connected to vias by a short trace that won't cause a whole lot of DRC errors on my PCB.

The footprint is for bypass caps placed on the component side of a multi-layer board. The vias take the cap terminals to the appropriate power or ground plane. My company's boards are not that complex and I generally hand route them, so this would save me from having to run traces and placing vias for all the bypass caps. I could also see this being useful for creating footprints that will accommodate both SMT and THT resistors and caps -- which I could have used more than once in the past when prototyping.

The problem that I run into is that in the process of generating the PCB from the schematic, the pad is correctly associated with its intended net, but neither the trace nor the via are associated with any net. This leads to DRC clearance errors as I have effectively connected a No Net trace to a pad with a net.


After placing all of the parts, you go into the design menu, click on netlist manager,
and then click on menu in the manager. Click on "update free primitives from component
pads", and it will set all connected free pads, vias, tracks, fills, etc. to be on that net.
Then, you can do an ERC to check the connectivity.


Jon



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