Hello and thank you for your extensive response.
I do apologise for not getting back to you earlier but have been fairly busy.
I think it is generally good practise to always have EVERY pin exposed even power 
supply pins but I do feel that putting the power pins off to one side is a neater way 
than having as part of a main component symbol. The only problem I have found so far, 
and I can't explain why, is that putting the power parts on to a separate page 
resulted in Protel wanting to add a complete extra chip to the pcb when I did an 
update.

I will study your other comments but am often amazed at how much extra work one has to 
do sometimes to achieve a basic feature - not bad for ASU$9000!!!!!

Best Regards
Laurie Biddulph
http://www.elby-designs.com
  ----- Original Message ----- 
  From: Abd ul-Rahman Lomax 
  To: Protel EDA Forum 
  Sent: Friday, December 12, 2003 5:07 AM
  Subject: Re: [PEDA] Power supply pins


  {this message bounced first time, outgoing mail server couldn't find 
  "techservinc.com"....)

  At 06:10 AM 12/10/2003, Laurie Biddulph wrote:
  >I hate having power supply pins as part of schematic component symbols 
  >(especially opamps and logic gate chips). I prefer to create an additional 
  >`component part' in the chip purely for the power supply pins. This makes 
  >it easier to assign decoupling components to the chip as well as reduce 
  >clutter in the main part of the schematic.

  This is a very legitimate way of dealing with the problem, as is having the 
  power pins be part of the symbol. Hidden pins have restricted application, 
  some say that they should never be used, but that goes too far. If you have 
  a digital design with standard logic, hiding the power pins may be acceptable.

  However, if a technician is going to have any difficulty later figuring out 
  which pin on a part is, for example, ground, it is better to be explicit.

  Making symbols with power pins as a separate part of the symbol, while it 
  is a little more complex -- in creating the symbols -- is really the best 
  of both worlds. All the power parts can be placed on a page -- or part of a 
  schematic page -- which shows power nets and bypass cap allocations. This 
  leaves the rest of the schematic for signal flow and logic, and not having 
  to deal with power connections and bypass on those pages saves both time 
  and space, and results in a schematic that is easier to read. The only 
  negative I can think of is that in a split-supply design the power 
  assignments are not necessarily on the same page so an error in assignment 
  might be less obvious.

  I consider the improvement in general readability to outweight that; it 
  just requires a little more caution, since, so far, there is no ERC for this.

  (If component classes could be set up in schematic and assigned power 
  supply classes, ERC would be possible, where a component was assigned the 
  incorrect power supply, i.e., an analog part gets a digital supply. This, 
  by the way, is a very common error in designs we receive as a service 
  bureau, and we do try to notice it and query the engineer.)

  >  Problem is Protel 99 doesn't like annotating these as it treats the 
  > power part as a real part and really gets messed up. I believe Protel DXP 
  > lets you assign the power supply pins to Part 0 and so, presumably, gets 
  > round the problem.

  I haven't looked into that aspect of DXP yet. The problem in P99 (and 
  earlier) is only with automatic annotation. I think one could get around 
  the problem by having two libraries: one would be the components with no 
  power pins (or with them as part of the main symbols), the other would have 
  the same parts with power pins removed. The schematic would be drawn, at 
  first, with the parts from the first library, and annotated. Then the 
  symbols would all be updated from the second library, and then the power 
  page would be added to the schematic. There are some caveats with updating 
  symbols, but I'm a bit rusty on that topic....

  Beyond that, manually assigning parts is normally not such a huge task. If 
  there is a way in DXP to exclude a symbol part from the autoannotation 
  task, this would indeed be an improvement.

  But there is usually manual attention needed to annotation, to cluster 
  logic functions, for example, on the same device so that signals remain 
  local instead of running across the board and back just to run through an 
  inverter. I'll often allow a few sections to be unused, more than the 
  absolute minimum, just to keep signals together. Logic functions are 
  generally cheap.

  >Hiding power pins is bad news especially if you use different power rails 
  >from, say, VCC and GND which are the common defaults for logic chips and 
  >so if you forget to unhide them you end up with a power net not going 
  >anywhere near your real power supply.

  Protel does not handle this probem as well as DOS Tango did. Tango allowed 
  sheet-wise net renaming. So you could place a power object on a sheet and a 
  short piece of wire with a net name. This would rename one of them to the 
  other (I forget which was which), allowing you to connect, for example, VCC 
  to +5V. Whatever was VCC on that sheet, as a power object or hidden power 
  pin, was reassigned to +5V. This had no effect on other sheets, thus 
  allowing multiple power supplies with the same hidden pins. It was explicit 
  and easy to understand.

  >Is there any recommended method in Protel 99 of handling the power pins on 
  >logic chips similar to my first method above that Protel 99 can handle 
  >comfortably?

  Protel has no problem dealing with separate power sections, *except* for 
  automatic annotation. It is a subset of the larger problem, which is that 
  automatic annotation is a limited tool and often results in undesired 
  assignments.

  However, I think there might be a way, I don't have time to test it at the 
  moment. The Annotation tool in 99SE has a number of controls. First, on the 
  basic page, you can set it to ignore selected parts, and you can use part 
  field match to control grouping (i.e., within multipart symbols, I think). 
  On the Advanced page, you can include or exclude schematic sheets from the 
  Annotation process.

  *So*, I'd try this:

  Having placed all my unannotated parts, excluding power sections, I'd run 
  autoannotate (Tools/Annotate). I would not allow it to assign multipart 
  sections, so every section would have its own unique number. (Uncheck all 
  options in "Group Parts Together If Match By"). If I have placed power 
  sections, I'd exclude them from annotation by one of the two methods 
  provided. (This process assumes that multipart symbols being annotated have 
  identical sections except for pin numbers and the power section, and that 
  section 1 is the basic functional section excluding power pins).

  Then I would pagewise renumber parts by selecting the appropriate number of 
  parts, such as up to six inverters for a hex inverter package, and 
  renumbering that part to one of the numbers already used for the six I have 
  chosen. This will be a unique number.

  I can use the annotate tool to auto-assign the sections by inverting 
  selection (so that all parts but the ones I'm working with are selected and 
  therefore ignored) and letting the tool group the parts together and assign 
  sections. But it might be nearly as fast to manually assign the sections, 
  something that is a good idea anyway if, for example, you are running a bus 
  through an octal inverter and you want the pins to be logically sequenced, 
  which can make for much better routing.

  After this, I'd add or edit the power page so that there is the appropriate 
  power section for each used part, having the same reference designator. If 
  I have both pages open, I can do this edit as part of the original edit, 
  i.e., I'd select, in the example given, the six inverter sections plus the 
  power section, and globally edit them, keyed on selection, to one of the 
  reference designators.

  When I'm done, I'd have a schematic with unique and appropriate reference 
  designators and sections on every page. Now, if I want to sequence the 
  designators, I'd generate a list of reference designators by any one of 
  several methods. I'd use a word-processor and spreadsheet, as necessary, to 
  put those numbers in alphanumeric sequence, and I'd generate compacted set 
  of reference designators to make a list that had, in place of U1, U5, and 
  U9, the designators U1, U2, U3. I'd then run Back Annotate with the file I 
  created. (I'd have to look at the manual to get the exact format, but it 
  might just be:

  U1 U1
  U5 U2
  U9 U3

  I'd be done. It might seem like there is extra work in grouping the parts, 
  but, in fact, that work would be reduced to what you ought to do anyway as 
  a good designer, i.e., control section assignments to keep the physical 
  layout simple.

  By the way, it is my practice to always place unused sections on the 
  schematic, and, as appropriate, to tie inputs directly (usually) or through 
  a resistor (depending on mfr. recommendation) to a power supply. But I 
  might do this at the end of a design, I don't want those inputs to be, for 
  example, connected to a power plane. Instead, they'll be wired on the 
  surface and thus easily available for blue-wire revisions. The unused 
  sections might be put on the power supply sheet or area.

  (Tango had an unused section report, something that has been overlooked in 
  Protel, as far as I know; you can get a list of reference designations and 
  part numbers -- i.e., section numbers -- as spreadsheet output, but there 
  is no quick way from that list to distinguish, for example, a part which is 
  not multipart from the first section of a multipart component, both of them 
  will have 1 as the part number. I ran this unused section report with every 
  design, to ensure that all part sections had been placed.)






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