Laurie Biddulph wrote:

Is there any recommended method in Protel 99 of handling the power pins on logic chips similar to my first method above that Protel 99 can handle comfortably?

Let me advocate my preferred method. I have the schematic symbol identical to the footprint, the powerpins visible. What the powerpins concerns I tend to work with netlabels, so the schematic is not cluttered with useless wires. The advantage is the ease of debugging with the scope probe. The schematic is sufficient.

The small overhead in manually swapping the wires for re-
assignment is considered worth the effort.

Rene
--
Ing.Buro R.Tschaggelar http://www.ibrtses.com
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