In the past I've developed my Xilinx FPGAs by creating a schematic in Protel 99SE, generating a netlist in Xilinx XNF 5.0 format, then compiling the XNFs using the Xilinx 3.1i application. To be compatible with the newer Xilinx devices, such as the Coolrunner II series, I have acquired their 6.1i application. However, 6.1i no longer supports XNF files. So my question is how to create something using 99SE that Xilinx 6.1i can handle. I've tried creating the Protel netlist in both VHDL and EDIF 2.0 format but either I'm doing something wrong or they are not compatible with Xilinx 6.1i. Does Protel DSP support this better? All suggestions are welcome.
Thanks, Ray Mitchell
Ray Mitchell
Engineer, Code 2732
SPAWAR Systems Center
San Diego, CA. 92152
(619)553-5344
[EMAIL PROTECTED]
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