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Duane The purpose of the article was to explore interactive routing....the interactive part and most boring part of this is manually fanning out. FAN out everything, boring and time consuming I know. but the rewards are no post clean up and very clean routes
Just say No to the basic.do FAN Out as I suggested, take my word for it. If you have components on both sides and routing channels are not open, it doesn't matter if you manually attempt to route .....routing channels must be open For your question.,,,," But i still would like the router to follow a 12mil track-SMDpad rule and a 14mil via-SMDpad rule" What are you calling track-SMD are you referring to the clearance to the smd pad? Trace widths can be controlled in Protel using net classes or identifying individual net names in the width rules set up. Open the DSN file using wordpad as I suggested, and do Control F to fine the net you assigned a rule to. If the net rule is not changed then the design rules are not set up in Protel. The DSN interface is excellent to ELECTRA and Spectra. If the design rules are set up, and there is ample clearance to push a 12 mil line thru, ELECTRA will route it in a microsecond. If it is not routing in microseconds after you type in route, then the rules are in conflict. It is that simple ....correct rules, yeilds efficient routing Mike -----Original Message----- From: Duane Foster [mailto:[EMAIL PROTECTED] Sent: Thursday, July 22, 2004 6:37 PM To: Protel EDA Forum Subject: Re: [PEDA] Autorouting Techniques thanks for your help.... see below for pointed response > -----Original Message----- > From: Mike Reagan [mailto:[EMAIL PROTECTED] > Sent: Thursday, July 22, 2004 3:08 PM > To: 'Protel EDA Forum' > Subject: Re: [PEDA] Autorouting Techniques > > > HI Duane > > Before I can give an answer to all of your question....I need > to know did > you follow my step by step instructions for fanning out? I > typically can > route any design ( large ones with several thousand components ) in 5 > passes. The secret is the routing channels must be kept > open. i did not do any fan out.. i tried this on the premise that it is a simple board which 99SE could autoroute.. this board has some 0805s and 14 pin SOICs.. are you recommending that i fan out the SOICs? > Secondly, > what is are you calling the "basic do" is this the do file Protel > generates? (DXP only). i am referring to a file which was installed by Electra (Basic.do). > I would stay away from assigning directives like "any > direction" this will > only complicate things by not steering the router to work for > you. Two > layer designs work as easily as multilayer ....as long as you > have open > channels. That is key. On very populated tight designs I > discount the > component side as a routing layer because the components are > in the way. i have components on both sides?! Perhaps it will route if i work on the component layout. But i still would like the router to follow a 12mil track-SMDpad rule and a 14mil via-SMDpad rule. Can you illuminate how to implement these special spacing rules? > > Electra will route 100 percent, as long as your rules make > sense. Take a > closer look at your rules and make sure they make sense. ie > can a 10 mil > line fit inside a 8 mil gap Let me know how I can help. > And thanks > for reading it. > > Mike Reagan > > > -----Original Message----- > From: Duane Foster [mailto:[EMAIL PROTECTED] > Sent: Thursday, July 22, 2004 4:18 PM > To: Protel EDA Forum > Subject: Re: [PEDA] Autorouting Techniques > > > Thanks for the white paper Mike. > > I have been curious to try the Electra autorouter ( mainly > because of your > enthusiastic plugs ), and so I read your white paper and got the demo. > > I routed a small double sided board with SMD on both sides. > I was able to > get 100% routed in 99SE using 10/10 and 12mil spacing SMD-track. 99SE > router will not do my desired 14mil SMD-via spacing, so i > manually adjusted > offending vias and cleaned up. > > I am trying Electra on the same layout and initially getting > 94% completion > and no adherance to any special clearance rules. > > I tried using your DO file and it seems ROUTE 5 is inadequate. Am i > misunderstanding your intention? > > I tried the basic.do file with an addition of "rule pcb > (clearance 12 (type > smd_wire)". I did not see any adherance to this special rule in the > resulting routing. > > I have tried using small grids and assigning layers to 'any' > direction, with > some improvement. > > I would be encouraged with Electra if I could get 100% routing with > adherance to my spacing rules. Any ideas or suggestions? Or > does Electra > shine on multi-layer stuff and this simple 2 layer board is under the > Electra radar? > > Duane Foster > > > -----Original Message----- > > From: edsi [mailto:[EMAIL PROTECTED] > > Sent: Wednesday, July 21, 2004 10:40 AM > > To: Protel EDA Forum > > Subject: [PEDA] Autorouting Techniques > > > > > > Hello All, > > > > Please feel free to visit www.konekt.com and read my white > > paper on how to use the Electra Autorouter with Protel 99SE > > and DXP products. I have been posting for some time now > > that this router is one of the best products available. I > > was asked by the ConnectEDA staff to write a paper for all > > you users that are afraid to try autorouters. I have not > > accepted any payment for this effort , my only interest is > > have better design tools available and to open a new dialog > > for Protel users. > > > > Enjoy the article > > > > Mike Reagan > > EDSI > > Frederick MD > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
