> On (10 Feb 95) [EMAIL PROTECTED] wrote... > > s> From: Simon Cooke <[EMAIL PROTECTED]> > s> Date: Fri, 10 Feb 1995 12:58:47 +0000 (GMT) > > s> And as soon as we can get hold of that damned 20MHz Z80, we'll build one > s> too... > > Have you tried STC head office at Harlow 01279 626 777 > original Type No. Z84C0020PEC Stock No. 034275F from 1991 catalogue the price > was listed as P.O.A. they may still stock it, I don't know...
I haven't actually -- but I might give it a whirl. Do they do free catalogues too? :) > s> the only problem I can see is the Dynamic RAM refresh circuitry. Anyone > s> know any reference text that's perfect for the job? > > How about using DRAMS that support /CAS before /RAS internal refresh address > counters? > > Text from a 256k by 1 DRAM data 'sheet':- The thing is that we're thinking of using SIMMs... I'll pore over the data sheet, but it looks like what I'm going to end up using is a tapped delay line -- maybe 3 or 4 buffers all connected in series or something like that -- to provide the multiplexing logic. > >From the above one would simply use z80 /RFSH line to cause a global /CAS > before /RAS access on all such DRAMS and they'd all be refreshed internally, > totally ignoring the 7bit /RAS address the z80 provides:-) k Ah, but the /RFSH line is the problem -- it doesn't appear to refresh often enough... On another note -- remember the paging "bug" you were talking about? It may be something to do with the fact that the ASIC only samples IORQ for its logic -- not M1 as well, so as Prodos uses IM2, the RETI sequence may trigger spurious I/O (as when you do a RETI, IORQ and M1 both drop low). Simon
