On (10 Feb 95) [EMAIL PROTECTED] wrote... e> From: [EMAIL PROTECTED] e> Date: Fri, 10 Feb 1995 17:11:53 +0000 (WET)
e> Yes- sorry, that was a bit garbled. What I basically meant was don't e> use the ASIC at all - ie build your own circuit to deal with the video, e> and make it permit memory acceses at the speed of the z80 you wish to e> use. Too much trouble, if you ask me. The problem as I see it is that the z80-CPU is used as a programable logic-cell of the ASIC... As such it's inherantly limited by the ASIC which pauses the z80 when ever it feels like it... Here's another way to zap up a "sam's"... Replace the internal DRAM with fast dual-ported RAM and place the ASIC on one port with suitable logic to fool it into thinking it's accessing the normal 256k x 4bit DRAMS and place whatever z80 compatable CPU on the other port. Make the I/O portion of the ASIC as a true peripheral of the new CPU with additional wait-states added to give the ASIC time to respond with it's /WAIT line... Appart from HMPR and LMPR those should be emulated externally to allow normal SAM mapping of the 512k ram into the CPU 64k address space... Any CPU mmu can play with local-CPU expansion memory. Standard ROM with additional wait-states could be used.. and the sound-chip, uarts, fdc's and RTC can still be accessed via the ASIC but would be better off decoded externally and wait-states added IF required. A new Sam like that *could* use any of the z80,z180 or z280 cpu's and would have zero ASIC intervention on any RAM accesses without mutilayed caches:-) Of course using these methods would mean that the base Sam changes from an elegent collection of just a few chips to just another complex piece of high-speed hardware. Johnathan. ... Parallel lines never meet, unless you bend one or both of them. -- |Fidonet: Johnathan Taylor 2:2501/307.9 |Internet: [EMAIL PROTECTED] | | Standard disclaimer: The views of this user are strictly his own.
