Hi Daniel and all,
since Linux 4.2 (tested with rc4), i think this commit
d328c9d78d64ca11e744fe227096990430a88477
"drm/i915: Select starting pipe bpp irrespective or the primary plane"
causes trouble for me and my users, as tested on Intel HD Ironlake and
Ivy Bridge with MiniDP->Singlelink-DVI
On Thursday, August 06, 2015 10:49 PM, Yakir Yang wrote:
>
> Hi all,
>Samsung exynos and Rockchip rk3288 almost share same dp controller,
> so I split the common code out, then rk3288 and exynos can re-used the
> same dp core driver. Cause I can't find the exact IP name of exynos dp
> controll
On Thursday, August 06, 2015 11:19 PM, Yakir Yang wrote:
>
> Split the dp core driver from exynos directory to bridge
> directory, and rename the core driver to analogix_dp_*,
> leave the platform code to analogix_dp-exynos.
>
> Signed-off-by: Yakir Yang
> ---
> drivers/gpu/drm/bridge/Kconfig
Joe,
å¨ 2015/8/6 23:05, Joe Perches åé:
> On Thu, 2015-08-06 at 09:04 -0500, Yakir Yang wrote:
>> make checkpatch.pl script happy
> That should not be the primary reason to submit a patch.
>
> Making it easier for human code reader to understand
> what the code does should be though.
Thanks f
On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
>
> In order to move exynos dp code to bridge directory,
> we need to convert driver drm bridge mode first. As
> dp driver already have a ptn3460 bridge, so we need
> to move ptn bridge to the next bridge of dp bridge.
>
> Signed-off-by: Ya
Jingoo,
å¨ 2015/8/6 22:41, Jingoo Han åé:
> On Thursday, August 06, 2015 10:49 PM, Yakir Yang wrote:
>> Hi all,
>> Samsung exynos and Rockchip rk3288 almost share same dp controller,
>> so I split the common code out, then rk3288 and exynos can re-used the
>> same dp core driver. Cause I
Jingoo,
å¨ 2015/8/6 22:33, Jingoo Han åé:
> On Thursday, August 06, 2015 11:19 PM, Yakir Yang wrote:
>> Split the dp core driver from exynos directory to bridge
>> directory, and rename the core driver to analogix_dp_*,
>> leave the platform code to analogix_dp-exynos.
>>
>> Signed-off-by: Ya
Hi Jingoo,
å¨ 2015/8/6 22:19, Jingoo Han åé:
> On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
>> In order to move exynos dp code to bridge directory,
>> we need to convert driver drm bridge mode first. As
>> dp driver already have a ptn3460 bridge, so we need
>> to move ptn bridge t
From: Kausal Malladi
BDW/SKL/BXT support Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into respective CSC registers.
This patch does the following:
1. Adds the core function to program CSC correction values for
BDW/SKL/BXT platform
2. Adds CSC correction macros/
From: Kausal Malladi
BDW/SKL/BXT supports DeGamma color correction feature, which linearizes all
the non-linear color values. This will be applied before Color
Transformation.
This patch does the following:
1. Adds the core function to program DeGamma correction values for
BDW/SKL/BXT platfor
From: Kausal Malladi
BDW/SKL/BXT platforms support various Gamma correction modes, which are:
1. Legacy 8-bit mode
2. 10-bit mode
3. 10-bit Split Gamma mode
4. 12-bit mode
This patch does the following:
1. Adds the core function to program Gamma correction values for BDW/SKL/BXT
platform
2. A
From: Kausal Malladi
This patch initializes gamma color correction proeprty
for Gen8 and higher platforms.
It does the following :
1. Load pipe Gamma color correction capabilities for BDW/SKL/BXT
2. Attach the color properties to CRTC
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Mallad
From: Kausal Malladi
CHV/BSW supports Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into CGM (Color Gamut Mapping) registers.
This patch does the following:
1. Attaches CSC property to CRTC
2. Adds the core function to program CSC correction values
3. Adds CSC corre
From: Kausal Malladi
This patch adds set and get property handlers for CSC color correction
and enhancement capability at Pipe level on CHV/BSW platform. The set
function just attaches the CSC blob to CRTC state, that later
gets committed using atomic path.
Signed-off-by: Shashank Sharma
Signed
From: Kausal Malladi
Color Manager framework defines a color correction property for color
space transformation and Gamut mapping. This property is called CTM (Color
Transformation Matrix).
This patch adds a new structure in DRM layer for CTM.
This structure can be used by all user space agents
From: Kausal Malladi
CHV/BSW supports DeGamma color correction, which linearizes all
the non-linear color values. This will be applied before Color
Transformation.
This patch does the following:
1. Attach deGamma property to CRTC
2. Add the core function to program DeGamma correction values for
From: Kausal Malladi
This patch adds set_property and get_property handlers for deGamma
color correction capability at Pipe level.
Set function just attaches the deGamma correction blob to CRTC state, which
will be later commited in the atomic commit path.
Signed-off-by: Shashank Sharma
Signed
From: Kausal Malladi
CHV/BSW platform supports two different pipe level gamma
correction modes, which are:
1. Legacy 8-bit mode
2. 10-bit CGM (Color Gamut Mapping) mode
This patch does the following:
1. Attaches Gamma property to CRTC
3. Adds the core Gamma correction function for CHV/BSW
4. Add
From: Kausal Malladi
I915 driver registers gamma correction as palette correction
property with DRM layer. This patch adds set_property() and get_property()
handlers for pipe level gamma correction.
The set function attaches the Gamma correction blob to CRTC state, these
values will be committed
From: Kausal Malladi
This patch adds new structures in DRM layer for Palette color
correction.These structures will be used by user space agents
to configure appropriate number of samples and Palette LUT for
a platform.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
include/
From: Kausal Malladi
This patch adds new variables in CRTC state, to hold respective color
correction blobs. These blobs will be required during the atomic commit
for writing the color correction values in correction registers.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
From: Kausal Malladi
As per Color Manager design, each driver is responsible to load its
palette color correction and enhancement capabilities in the form of
a DRM blob property, so that user space can query and read.
This patch does the following:
1. Create new files intel_color_manager(.c/.h)
From: Kausal Malladi
The DRM color management framework is targeting various hardware
platforms and drivers. Different platforms can have different color
correction and enhancement capabilities.
A commom user space application can query these capabilities using the
DRM property interface. Each d
From: Kausal Malladi
This patch adds atomic get property interface for Intel CRTC. This
interface will be used for get operation on any non-core DRM properties.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_atomic.c | 8
drivers/gpu/drm/
From: Kausal Malladi
This patch adds atomic set property interface for Intel CRTC. This
interface will be used for set operation on any DRM properties.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_atomic.c | 9 +
drivers/gpu/drm/i915/int
From: Kausal Malladi
Color Management is an extension to Kernel display framework. It allows
abstraction of hardware color correction and enhancement capabilities by
virtue of DRM properties.
This patch initializes color management framework by :
1. Introducing new pointers in DRM mode_config st
This patch set adds Color Manager implementation in DRM layer. Color Manager is
an extension in DRM framework to support color correction/enhancement. Various
Hardware platforms can support several color correction capabilities.
Color Manager provides abstraction of these capabilities and allows a
make checkpatch.pl script happy
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 224
drivers/gpu/drm/exynos/exynos_dp_core.h | 53
drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +++---
3 files changed, 185 insertion
> @@ -134,6 +136,7 @@ config DRM_AMDGPU
> select HWMON
> select BACKLIGHT_CLASS_DEVICE
> select INTERVAL_TREE
> + select DRM_AMD_GNB_BUS
Here you select the symbol.
[...]
> +config DRM_AMD_GNB_BUS
> + tristate "AMD GNB bus - used for GNB IPs such as ACP and ISP"
Here y
On 2015ë
08ì 06ì¼ 19:13, Marek Szyprowski wrote:
> Hello,
>
> On 2015-04-09 10:46, Marek Szyprowski wrote:
>> Once pm_runtime_set_active() gets called, the kernel assumes that given
>> device has already enabled runtime pm and will call pm_runtime_suspend()
>> without matching pm_runtime_resu
On 2015ë
08ì 06ì¼ 08:24, Gustavo Padovan wrote:
> From: Gustavo Padovan
>
> Hi,
>
> This patchset is another important step in the exynos clean up, it removes
> two exynos internal structs in favor of wider use of struct drm_encoder.
>
> Structs exynos_drm_display and exynos_drm_encoder we
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return -ENODEV;
> +
> + memset(&cz_board_info, 0, sizeof(struct i2c_board_info));
> + cz_board_info.addr = CZ_CODEC_I2C_ADDR;
> + strlcpy(cz_board_info.type, codec_acpi_name, I2C_NAME_SIZE);
> +
> +#ifdef CONFIG_PINCTRL_AMD
> + if (gpio_is_valid(CZ_HPJACK_GPIO)) {
> + ret = gpio_request_one(CZ_HPJACK_GPIO, GPIOF_DIR_IN |
> + GPIOF_EXPORT, "hp-gpio");
> + if (ret != 0)
> + pr_err("gpio_request_one failed : err %d\n", ret);
As well as the whole thing with getting this from ACPI rather than
defining magic numbers this should be done in the card init not in the
module init (like other card drivers do). This then means you don't
need any global variables.
> +#endif
> + i2c_client = i2c_new_device(adapter, &cz_board_info);
> + i2c_put_adapter(adapter);
> + if (!i2c_client)
> + return -ENODEV;
No, definitely not - ACPI has perfectly good bindings for instantiating
I2C devices (indeed the laptop I'm typing this on actually uses them to
instantiate exactly the same RT286 audio CODEC you're using here),
please use them.
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On Thu, Aug 06, 2015 at 05:33:54PM +0200, Vlastimil Babka wrote:
> On 07/29/2015 05:42 PM, Eric B Munson wrote:
> >The cost of faulting in all memory to be locked can be very high when
> >working with large mappings. If only portions of the mapping will be
> >used this can incur a high penalty for
ttp://lists.freedesktop.org/archives/dri-devel/attachments/20150806/fc40c557/attachment.html>
On 07/29/2015 05:42 PM, Eric B Munson wrote:
> The cost of faulting in all memory to be locked can be very high when
> working with large mappings. If only portions of the mapping will be
> used this can incur a high penalty for locking.
>
> For the example of a large file, this is the usage patte
On Thu, Aug 06, 2015 at 10:44:28AM -0400, Alex Deucher wrote:
> On Thu, Aug 6, 2015 at 10:31 AM, Russell King wrote:
> > On Thu, Aug 06, 2015 at 04:16:20PM +0200, Daniel Vetter wrote:
> >> Hi Linus,
> >>
> >> On Wed, Aug 05, 2015 at 11:14:34PM +0100, Russell King wrote:
> >> > Please incorporate t
Hi Linus,
On Wed, Aug 05, 2015 at 11:14:34PM +0100, Russell King wrote:
> Please incorporate the latest TDA998x I2C driver fixes, which can be
> found at:
Let's try this again with forwarding a -fixes pull to Linus ;-)
-Daniel
>
> git://ftp.arm.linux.org.uk/~rmk/linux-arm.git drm-tda998x-fixe
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On Thu, Aug 06, 2015 at 04:16:20PM +0200, Daniel Vetter wrote:
> Hi Linus,
>
> On Wed, Aug 05, 2015 at 11:14:34PM +0100, Russell King wrote:
> > Please incorporate the latest TDA998x I2C driver fixes, which can be
> > found at:
>
> Let's try this again with forwarding a -fixes pull to Linus ;-)
>
On Wed, Aug 05, 2015 at 05:10:17PM -0300, Tiago Vignatti wrote:
> On 08/05/2015 04:08 AM, Daniel Vetter wrote:
> >On Tue, Aug 04, 2015 at 06:30:25PM -0300, Tiago Vignatti wrote:
> >Nah they don't have to be equal since the problem isn't that nothing goes
> >out to memory where the display can see i
Does virtgpu provides the same or a similar mechanism as QXL virtual GPU does?
Dynamic guest resizing related.
Ref.
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/gpu/drm/qxl/qxl_display.c?id=4695b03
On Thu, Aug 06, 2015 at 06:17:28AM +0200, Maarten Lankhorst wrote:
> Op 06-08-15 om 00:25 schreef Daniel Vetter:
> > On Wed, Aug 5, 2015 at 8:13 PM, Maarten Lankhorst
> > wrote:
> >> Op 05-08-15 om 17:03 schreef Daniel Vetter:
> >>> On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
> >>> wrote:
>
We want to make sure that no one tries to acquire more locks and
states, and ww mutexes provide debug facilities for that. So use them.
v2: Only call acquire_done when ->atomic_check was successful to avoid
falling over an -EDEADLK (spotted by Maarten).
Cc: Rob Clark
Cc: Maarten Lankhorst
Signe
On Thu, Aug 06, 2015 at 01:19:35PM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 06-08-15 om 11:47 schreef Daniel Stone:
> > Hi,
> >
> > On 30 July 2015 at 08:03, Maarten Lankhorst
> > wrote:
> >> This will cause drm_atomic_helper_page_flip and drm_mode_atomic_ioctl to
> >> fail with -EINVAL if a
:
<http://lists.freedesktop.org/archives/dri-devel/attachments/20150806/9683ef7b/attachment.html>
Hey,
Op 05-08-15 om 08:18 schreef Tomi Valkeinen:
> Hi,
>
> On 21/07/15 14:28, Maarten Lankhorst wrote:
>> In intel it's useful to keep track of some state changes with old
>> crtc state vs new state, for example to disable initial planes or
>> when a modeset's prevented during fastboot.
>>
>> Cc:
for the bug.
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) and then GL3
GPUs (r600), yet the market demanded GL2 drivers.
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Hey,
Op 06-08-15 om 11:47 schreef Daniel Stone:
> Hi,
>
> On 30 July 2015 at 08:03, Maarten Lankhorst
> wrote:
>> This will cause drm_atomic_helper_page_flip and drm_mode_atomic_ioctl to
>> fail with -EINVAL if a event is requested on a inactive crtc.
>>
>> Signed-off-by: Maarten Lankhorst
>> --
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611.
Please open a different bug for that issue.
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On Tue, 4 Aug 2015 09:04:08 -0300
Danilo Cesar Lemes de Paula wrote:
> Describing arguments at top of a struct definition works fine
> for small/medium size structs, but it definitely doesn't work well
> for struct with a huge list of elements.
>
> Keeping the arguments list inside the struct b
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Hello,
On 2015-04-09 10:46, Marek Szyprowski wrote:
> Once pm_runtime_set_active() gets called, the kernel assumes that given
> device has already enabled runtime pm and will call pm_runtime_suspend()
> without matching pm_runtime_resume(). In case of DRM FIMC IPP driver,
> this will result in cal
On Wed, Aug 05, 2015 at 10:48:54PM +0100, Russell King - ARM Linux wrote:
> On Wed, Aug 05, 2015 at 08:03:12PM +0100, Liviu Dudau wrote:
> > I have to confess that I am not entirely up to speed with the TDA19988
> > situation at the moment. Andrew Jackson was dealing with that and
> > working with
Hi Joonyoung,
On 28 July 2015 at 09:53, Joonyoung Shim wrote:
> static void update_vm_cache_attr(struct exynos_drm_gem_obj *obj,
> struct vm_area_struct *vma)
> {
> @@ -169,6 +159,11 @@ struct exynos_drm_gem_obj *exynos_drm_gem_create(struct
> drm_device
Hi,
On 30 July 2015 at 08:03, Maarten Lankhorst
wrote:
> This will cause drm_atomic_helper_page_flip and drm_mode_atomic_ioctl to
> fail with -EINVAL if a event is requested on a inactive crtc.
>
> Signed-off-by: Maarten Lankhorst
> ---
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/d
On Thu, Aug 6, 2015 at 10:31 AM, Russell King wrote:
> On Thu, Aug 06, 2015 at 04:16:20PM +0200, Daniel Vetter wrote:
>> Hi Linus,
>>
>> On Wed, Aug 05, 2015 at 11:14:34PM +0100, Russell King wrote:
>> > Please incorporate the latest TDA998x I2C driver fixes, which can be
>> > found at:
>>
>> Let'
From: Gustavo Padovan
struct exynos_drm_encoder was justing wrapping struct drm_encoder, it had
only a drm_encoder member and the internal exynos_drm_encoders ops that
was directly mapped to the drm_encoder helper funcs.
So now exynos DRM uses struct drm_encoder directly, this removes
completely
From: Gustavo Padovan
As we are removing the exynos encoder move the encoder setup operation
directly inside the exynos_drm_load()
Signed-off-by: Gustavo Padovan
---
drivers/gpu/drm/exynos/exynos_drm_drv.c | 12 ++--
drivers/gpu/drm/exynos/exynos_drm_encoder.c | 13 -
d
Hi Inki,
2015-08-06 Inki Dae :
> On 2015ë
08ì 06ì¼ 08:24, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Hi,
> >
> > This patchset is another important step in the exynos clean up, it removes
> > two exynos internal structs in favor of wider use of struct drm_encoder.
> >
> > Stru
From: Maruthi Srinivas Bayyavarapu
Added runtime PM functionality to AMD I2S driver. This uses
functionality from ACP IP methods.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Alex Deucher
Reviewed-by: Murali Krishna Vemuri
---
sound/soc/amd/acp-pcm-dma.c | 87 +
From: Maruthi Srinivas Bayyavarapu
Added suspend/resume functionality for AMD ACP ASoC PCM driver.
Enabled them in the ASoC machine driver
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Alex Deucher
Reviewed-by: Murali Krishna Vemuri
---
sound/soc/amd/acp-pcm-dma.c | 31
From: Maruthi Srinivas Bayyavarapu
ACP IP block consists of dedicated DMA and I2S blocks. The PCM driver
provides the DMA and CPU DAI components to ALSA core. Machine driver
provides the audio functionality together with the PCM driver and rt286
codec driver.
v2: squash in Kconfig fix
Signed-of
From: Maruthi Srinivas Bayyavarapu
Replaced usage of bitfield logic with alternative
Signed-off-by: Maruthi Bayyavarapu
Reviewed- by: Alex Deucher
---
drivers/gpu/drm/amd/acp/acp_hw.c | 61 +---
drivers/gpu/drm/amd/acp/acp_hw.h | 22 +--
2 files
From: Maruthi Srinivas Bayyavarapu
ACP internal memory banks 0 to 9 are used for audio usecases
(playback/capture). Remaining banks 10 to 47 are shutdown to save power.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Murali Krishna Vemuri
Acked-by: Alex Deucher
---
drivers/gpu/drm/amd/acp/ac
From: Maruthi Srinivas Bayyavarapu
There are 48 SRAM memory banks in ACP 2.1. Use bank index - 0 for
DMA descriptors 1 to 4 for playback, 5 to 8 for capture.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Murali Krishna Vemuri
Acked-by: Alex Deucher
---
drivers/gpu/drm/amd/acp/acp_hw.c | 10
From: Maruthi Srinivas Bayyavarapu
ACP IP can be powered on and off during system wide suspend/resume
transition. AMD ASoC PCM device will use this module during
system suspend/resume and PCM device's runtime pm.
Also, updated code comments.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Alex
From: Maruthi Srinivas Bayyavarapu
The following are design changes for ACP DMA :
1. For capture usecase, DMA Interrupt on Complete is added for
ACP_TO_SYSRAM_CH_NUM DMA channel
2. For playback usecase, the destination for DMA descriptors is
reversed.
3. Finally, modified DMA buffer positio
From: Maruthi Bayyavarapu
This adds the ACP (Audio CoProcessor) IP driver and wires
it up to the amdgpu driver. The ACP block provides the DMA
engine and bus for the i2s codec which is supported by an
alsa driver. This is required for audio on APUs that
utilize an i2s codec.
v2: integrate i2s/
From: Maruthi Srinivas Bayyavarapu
with the default gnb bus runtime pm ops, alsa pcm device attached to
it is unable to get runtime suspended/resumed.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/bus/amd_gnb_bus.c | 5 -
1 file changed, 5 deletions(
From: Chunming Zhou
This is used by the incoming ACP driver. The DMA
engine for the i2s audio codec is part of the GPU.
This exposes an amd gnb bus for the i2s codec to
hang off of.
Reviewed-by: Jammy Zhou
Signed-off-by: Chunming Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/Kconfig
Hi,
This patch set implements support for i2s audio and new AMD GPUs.
The i2s codec is fed by a DMA engine on the GPU. To handle this
we create an amd gnb (graphics northbridge) bus which we can hang
the i2s codec on. Because of this, this patch set covers two
subsystems: drm and alsa. The drm
On Thu, Aug 06, 2015 at 10:09:37AM +0100, Chris Wilson wrote:
> On Wed, Aug 05, 2015 at 07:13:11PM -0300, Tiago Vignatti wrote:
> > Userspace is the one in charge of flush CPU by wrapping mmap with
> > begin{,end}_cpu_access.
> >
> > v2: Remove LLC check cause we have dma-buf sync providers now. A
On Wed, Aug 05, 2015 at 07:13:11PM -0300, Tiago Vignatti wrote:
> Userspace is the one in charge of flush CPU by wrapping mmap with
> begin{,end}_cpu_access.
>
> v2: Remove LLC check cause we have dma-buf sync providers now. Also, fix
> return
> before transferring ownership when mmap fails.
i91
Some edp screen with no hpd signal would need some delay time
to ensure that screen would be ready for work, so we can expand
the delay time in hpd detect function, it works prefectly on my
rk3288 sdk board.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/analogix_dp_core.c | 2 +-
1 file c
ttp://lists.freedesktop.org/archives/dri-devel/attachments/20150806/78b8fe67/attachment.html>
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
Besides TRM indicate that if HPD_STATUS(RO) is 0, AUX CH will not
work, so we need to give a force hpd action to set HPD_STATUS manually.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/a
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/analogix_dp_reg.c | 76
drivers/gpu/drm/bridge/analogix_dp_reg.h | 12 +
2 files changed, 60 insertions(+),
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/exynos/analogix_dp-exynos.c | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
include/drm/bridge/analogix_dp.h| 6 ++
3 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/exynos/analogix_dp-exynos.c
b/dri
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
Split the dp core driver from exynos directory to bridge
directory, and rename the core driver to analogix_dp_*,
leave the platform code to analogix_dp-exynos.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/Kconfig |5 +
drivers/gpu/drm/bridge/Makefile
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 196 +++
make checkpatch.pl script happy
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 224
drivers/gpu/drm/exynos/exynos_dp_core.h | 53
drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +++---
3 files changed, 185 insertions(+),
this mail because:
You are the assignee for the bug.
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Hi all,
Samsung exynos and Rockchip rk3288 almost share same dp controller,
so I split the common code out, then rk3288 and exynos can re-used the
same dp core driver. Cause I can't find the exact IP name of exynos dp
controller, so I decide to name dp core driver with "analogix" which I
find in
On Thu, 2015-08-06 at 09:04 -0500, Yakir Yang wrote:
> make checkpatch.pl script happy
That should not be the primary reason to submit a patch.
Making it easier for human code reader to understand
what the code does should be though.
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
> b/dr
Op 06-08-15 om 00:25 schreef Daniel Vetter:
> On Wed, Aug 5, 2015 at 8:13 PM, Maarten Lankhorst
> wrote:
>> Op 05-08-15 om 17:03 schreef Daniel Vetter:
>>> On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
>>> wrote:
Op 05-08-15 om 15:08 schreef Daniel Vetter:
> We want to make sure that
Dave,
Take 2 implementing screen targets, this time with the fbdev code adjusted
accordingly.
Also there is an implementation of register-driven command buffers, that
overrides the FIFO ring for command processing. It's needed for our upcoming
hardware revision.
The following changes since commi
The plane reset handler frees the plane state and allocates a new
default state, but when doing so attempt to free the plane state using
the base plane state pointer instead of casting it to the
driver-specific state object that has been allocated. Fix it by using
the rcar_du_plane_atomic_destroy_s
The DPAD RGB output can be driven by both DU0 and DU1 on R8A7791. Mark
the DU0 connection as possible.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
b/drivers/gp
https://bugzilla.kernel.org/show_bug.cgi?id=101391
--- Comment #4 from Michel Dänzer ---
(In reply to Michael Long from comment #3)
> Bisecting: 12 revisions left to test after this (roughly 4 steps)
> error: Your local changes to the following files would be overwritten by
> checkout:
You need
On Wed, Aug 5, 2015 at 8:13 PM, Maarten Lankhorst
wrote:
> Op 05-08-15 om 17:03 schreef Daniel Vetter:
>> On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
>> wrote:
>>> Op 05-08-15 om 15:08 schreef Daniel Vetter:
We want to make sure that no one tries to acquire more locks and
states,
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