Re: + drivers-gpu-drm-i915-intel_lvdsc-fix-locking-snafu.patch added to -mm tree
On Mon, Feb 02, 2009 at 10:44:48PM -0800, Andrew Morton wrote: Enabling kms works flawlessly now, but when I fire up X, the screen blanks (no more blinking cursors), then X hangs. vt-switchings doesn't work anymore, otherwise the machine looked fine (ping on the network was fine, couldn't check anything else for lack of a running sshd on the crashing machine). Twice using SysRq-T (half a minute in between) showed that Xorg was indeed stuck, both times with the exact same backtrace: Xorg D 00203246 6448 6049 6048 f1c81df0 00203046 f6322720 00203246 f1c81de0 f83fb98d f6322720 f632297c 00203046 f1d88444 00203046 f2f63cc0 f8388dae f1d88444 f1d88408 00203246 f1c81e2c c02e18ba f83fb98d f6322720 f1d88430 f1d88444 Call Trace: [f83fb98d] ? intel_lvds_get_modes+0x69/0x94 [i915] [f8388dae] ? drm_mode_getconnector+0x54/0x31f [drm] [c02e18ba] mutex_lock_nested+0x158/0x254 [f83fb98d] ? intel_lvds_get_modes+0x69/0x94 [i915] [f83fb98d] intel_lvds_get_modes+0x69/0x94 [i915] [f838a170] drm_helper_probe_single_connector_modes+0xb8/0x194 [drm] [f8388e20] drm_mode_getconnector+0xc6/0x31f [drm] [c02e13bc] ? mutex_unlock+0xd/0xf [f837f71f] drm_ioctl+0x1c1/0x23d [drm] [f8388d5a] ? drm_mode_getconnector+0x0/0x31f [drm] [f837f55e] ? drm_ioctl+0x0/0x23d [drm] [c0191277] vfs_ioctl+0x43/0x56 [c0191a34] do_vfs_ioctl+0x49f/0x4e0 [c0186c42] ? vfs_write+0xf5/0x131 [c0191aba] sys_ioctl+0x45/0x5f [c0102e91] sysenter_do_call+0x12/0x31 This is on 2.6.29-rc3-00100-gf2257b7. So I assume that it would make sense to track this as a post-2.6.28 regression? Nope. Like the previous issue it only happens when I run-time enable kernel modesetting (with # modprobe i915 modeset=1), which is not the default. I'm gonna open a new bz entry with all the details (and all the people on cc minus regression handlers). But first I'll check with CONFIG_LOCKDEP whether it's really a locking goof-up. -Daniel -- Daniel Vetter E-Mail: daniel.vet...@ffwll.ch Tel.: +41 (0)79 365 57 48 -- Create and Deploy Rich Internet Apps outside the browser with Adobe(R)AIR(TM) software. With Adobe AIR, Ajax developers can use existing skills and code to build responsive, highly engaging applications that combine the power of local resources and data with the reach of the web. Download the Adobe AIR SDK and Ajax docs to start building applications today-http://p.sf.net/sfu/adobe-com -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: + drivers-gpu-drm-i915-intel_lvdsc-fix-locking-snafu.patch added to -mm tree
I can confirm that this patch fixes the problem. I tested with the locking
validator, and it looks like locking is now fine on my hardware.
Thanks everyone for tracking down this issue.
-Daniel
On Tue, Feb 03, 2009 at 09:58:16AM +, Dave Airlie wrote:
On Mon, 2 Feb 2009, Andrew Morton wrote:
(cc's added)
On Sat, 31 Jan 2009 16:25:08 +0100 Daniel Vetter dan...@ffwll.ch wrote:
On Thu, Jan 29, 2009 at 01:48:25PM -0800, Andrew Morton wrote:
On Thu, 29 Jan 2009 13:24:17 -0800
Jesse Barnes jbar...@virtuousgeek.org wrote:
On Thursday, January 29, 2009 12:50 pm a...@linux-foundation.org
wrote:
So I assume that it would make sense to track this as a post-2.6.28
regression?
From ac048e1734699dd98f4bdf4daf2b9592d4a4d38e Mon Sep 17 00:00:00 2001
From: Dave Airlie airl...@redhat.com
Date: Tue, 3 Feb 2009 19:05:12 +1000
Subject: [PATCH] i915: fix unneeded locking in i915 LVDS get modes code.
This code is always called under the lock from the higher layers,
so need to go locking it here.
Signed-off-by: Dave Airlie airl...@redhat.com
---
drivers/gpu/drm/i915/intel_lvds.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index b36a521..cf8da64 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -311,10 +311,8 @@ static int intel_lvds_get_modes(struct drm_connector
*connector)
if (dev_priv-panel_fixed_mode != NULL) {
struct drm_display_mode *mode;
- mutex_lock(dev-mode_config.mutex);
mode = drm_mode_duplicate(dev, dev_priv-panel_fixed_mode);
drm_mode_probed_add(connector, mode);
- mutex_unlock(dev-mode_config.mutex);
return 1;
}
--
1.6.0.6
--
Daniel Vetter
E-Mail: daniel.vet...@ffwll.ch
Tel.: +41 (0)79 365 57 48
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Re: + drivers-gpu-drm-i915-intel_lvdsc-fix-locking-snafu.patch added to -mm tree
On Wed, Feb 04, 2009 at 07:03:57PM +0100, Bruno Prémont wrote: This patch does not work for me. With this patch applied kernel fails to read EDID data and discover proper modes. (It ends up displaying a picture looking like the BIOS bootup image). X fails to start finding no valid mode for LVDS output. I've had the same problem (at least wrt to X), but it seems to disappear when cold-booting. It even works when I boot with modeset=0, kill X, then reload the i915 module with modeset=1. Maybe the kms is a bit flakey when X played with it for too long beforehands. But kernel modesetting for the framebuffer console always works, so YMMV. -Daniel -- Daniel Vetter E-Mail: daniel.vet...@ffwll.ch Tel.: +41 (0)79 365 57 48 -- Create and Deploy Rich Internet Apps outside the browser with Adobe(R)AIR(TM) software. With Adobe AIR, Ajax developers can use existing skills and code to build responsive, highly engaging applications that combine the power of local resources and data with the reach of the web. Download the Adobe AIR SDK and Ajax docs to start building applications today-http://p.sf.net/sfu/adobe-com -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 0/6] kernel modsetting support for intel overlay
Hi all, This series implements support for the intel overlay hw with kms. Caveats/Remarks: - the overlay image is flickering but stabilizes after a few secs of showing the same frame. I've researched intel ddx history/bugs and there was a similar issue in the original userspace modesetting driver, but I haven't found the solution. Hints/ideas highly appreciated. - untested on anything else than a 855GM - this is the only hw I have. Especially panel fitting one-line-mode is completely untested. Testing this needs an LVDS with vertical resolution less than native but larger than 1024. - patches 1, 4, 5 change drm-generic code. - the ioctl interface is intel-only. Anyone (radeon devs?) working on another overlay implementation/interested in sharing code? Yours, Daniel PS: I'll post the ddx part shortly to intel-gfx. Daniel Vetter (6): [drm]: make drm_mode_object_find typesafe [drm/i915] remove open-coded drm_mode_object_find [drm/i915]: modeset: always set intel_crtc-dpms_mode [drm/i915]: require_pipe_a helper functions [drm/i915]: add i915_lp_ring_sync helper [drm/i915] implement drmmode overlay support drivers/gpu/drm/drm_crtc.c |3 +- drivers/gpu/drm/drm_crtc_helper.c|3 +- drivers/gpu/drm/i915/Makefile|1 + drivers/gpu/drm/i915/i915_dma.c |7 + drivers/gpu/drm/i915/i915_drv.h |5 + drivers/gpu/drm/i915/i915_gem.c | 51 ++- drivers/gpu/drm/i915/i915_reg.h |5 + drivers/gpu/drm/i915/intel_display.c | 133 +++- drivers/gpu/drm/i915/intel_drv.h | 35 + drivers/gpu/drm/i915/intel_overlay.c | 1289 ++ include/drm/drm_crtc.h |3 +- include/drm/drm_crtc_helper.h|2 + include/drm/drm_os_linux.h |2 +- include/drm/i915_drm.h | 71 ++ 14 files changed, 1579 insertions(+), 31 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_overlay.c -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 4/6] [drm/i915]: require_pipe_a helper functions
These will be used to ensure that the clock of pipe a is running
when the overlay is switched on. Programming logic more or less
directly ported over from userspace.
Also export the already existing helper function drm_encoder_crtc_ok.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_crtc_helper.c|3 +-
drivers/gpu/drm/i915/intel_display.c | 83 ++
drivers/gpu/drm/i915/intel_drv.h |5 ++
include/drm/drm_crtc_helper.h|2 +
4 files changed, 92 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index 6aaa2cb..2d837a5 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -511,7 +511,7 @@ static void drm_setup_crtcs(struct drm_device *dev)
*
* Return false if @encoder can't be driven by @crtc, true otherwise.
*/
-static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
+bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
struct drm_crtc *crtc)
{
struct drm_device *dev;
@@ -532,6 +532,7 @@ static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
return true;
return false;
}
+EXPORT_SYMBOL(drm_encoder_crtc_ok);
/*
* Check the CRTC we're going to map each output to vs. its current
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 818c703..cb709b8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2936,6 +2936,89 @@ void intel_release_load_detect_pipe(struct intel_output
*intel_output, int dpms_
}
}
+/** Ensure that pipe A is enabled. Returns the crtc that runs pipe a or NULL
+ * if pipe a is already enabled */
+struct drm_crtc *intel_require_pipe_a_start(struct drm_device *dev,
+ int *dpms_mode)
+{
+ struct drm_crtc *crtc;
+ struct intel_crtc *intel_crtc;
+ struct drm_connector *connector;
+ struct drm_crtc_helper_funcs *crtc_funcs;
+ struct intel_output *intel_output;
+
+ crtc = intel_get_crtc_from_pipe(dev, 0);
+ intel_crtc = to_intel_crtc(crtc);
+ BUG_ON(intel_crtc-pipe != 0);
+
+ if (crtc-enabled intel_crtc-dpms_mode == DRM_MODE_DPMS_ON)
+ return NULL;
+
+ DRM_DEBUG(i915: require PIPEA, switching on crtc ...\n);
+
+ *dpms_mode = intel_crtc-dpms_mode;
+
+ if (crtc-enabled intel_crtc-dpms_mode != DRM_MODE_DPMS_ON) {
+ /* just switch it on */
+ crtc_funcs = crtc-helper_private;
+ crtc_funcs-dpms(crtc, DRM_MODE_DPMS_ON);
+
+ return crtc;
+ }
+
+ if (!drm_helper_crtc_in_use(crtc)) {
+ /* look for an encoder/connector */
+ list_for_each_entry(connector,
+ dev-mode_config.connector_list, head) {
+ intel_output = to_intel_output(connector);
+
+ if (intel_output-enc.crtc)
+ /* don't steal connectors */
+ continue;
+
+ if (!drm_encoder_crtc_ok(intel_output-enc, crtc))
+ continue;
+
+ intel_output-enc.crtc = crtc;
+ break;
+ }
+ }
+
+ drm_crtc_helper_set_mode(crtc, load_detect_mode, 0, 0, crtc-fb);
+ BUG_ON(crtc-enabled);
+
+ return crtc;
+}
+
+void intel_require_pipe_a_end(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ int dpms_mode)
+{
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ struct drm_encoder *encoder;
+ struct drm_crtc_helper_funcs *crtc_funcs;
+
+ if (!crtc)
+ return;
+
+ crtc_funcs = crtc-helper_private;
+
+ DRM_DEBUG(i915: require PIPEA, switching off crtc ...\n);
+
+ /* Switch crtc and output back off if necessary */
+ if (crtc-enabled dpms_mode != DRM_MODE_DPMS_ON) {
+ list_for_each_entry(encoder,
+ dev-mode_config.encoder_list, head) {
+ if (encoder-crtc != crtc)
+ continue;
+ encoder_funcs = encoder-helper_private;
+ encoder_funcs-dpms(encoder, dpms_mode);
+ }
+
+ crtc_funcs-dpms(crtc, dpms_mode);
+ }
+}
+
/* Returns the clock of the currently programmed mode of the given pipe. */
static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d6f92ea..f747dd4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -142,6 +142,11 @@ extern struct drm_crtc *intel_get_load_detect_pipe(struct
intel_output
[PATCH 2/6] [drm/i915] remove open-coded drm_mode_object_find
And clean up a small whitespace goof-up in the same function, while
I was looking at it.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 20
1 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d6fce21..bb59356 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3124,30 +3124,26 @@ int intel_get_pipe_from_crtc_id(struct drm_device *dev,
void *data,
{
drm_i915_private_t *dev_priv = dev-dev_private;
struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data;
- struct drm_crtc *crtc = NULL;
- int pipe = -1;
+ struct drm_mode_object *drmmode_obj;
+ struct intel_crtc *crtc;
if (!dev_priv) {
DRM_ERROR(called with no initialization\n);
return -EINVAL;
}
- list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- if (crtc-base.id == pipe_from_crtc_id-crtc_id) {
- pipe = intel_crtc-pipe;
- break;
- }
- }
+ drmmode_obj = drm_mode_object_find(dev, pipe_from_crtc_id-crtc_id,
+ DRM_MODE_OBJECT_CRTC);
- if (pipe == -1) {
+ if (!drmmode_obj) {
DRM_ERROR(no such CRTC id\n);
return -EINVAL;
}
- pipe_from_crtc_id-pipe = pipe;
+ crtc = to_intel_crtc(obj_to_crtc(drmmode_obj));
+ pipe_from_crtc_id-pipe = crtc-pipe;
- return 0;
+ return 0;
}
struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)
--
1.6.3.3
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[PATCH 5/6] [drm/i915]: add i915_lp_ring_sync helper
This just waits until the hw passed the current ring position with
cmd execution. This slightly changes the existing i915_wait_request
function to make uninterruptible waiting possible - no point in
returning to userspace while mucking around with the overlay, that
piece of hw is just too fragile.
Also replace a magic 0 with the symbolic constant (and kill the then
superflous comment) while I was looking at the code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c | 51 +++---
include/drm/drm_os_linux.h |2 +-
3 files changed, 43 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7537f57..2d79ede 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -692,6 +692,7 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int i915_gem_do_init(struct drm_device *dev, unsigned long start,
unsigned long end);
int i915_gem_idle(struct drm_device *dev);
+int i915_lp_ring_sync(struct drm_device *dev);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
int write);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 140bee1..6f1b5f9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1723,12 +1723,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
mutex_unlock(dev-struct_mutex);
}
-/**
- * Waits for a sequence number to be signaled, and cleans up the
- * request and object lists appropriately for that event.
- */
static int
-i915_wait_request(struct drm_device *dev, uint32_t seqno)
+i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
{
drm_i915_private_t *dev_priv = dev-dev_private;
u32 ier;
@@ -1750,10 +1746,17 @@ i915_wait_request(struct drm_device *dev, uint32_t
seqno)
dev_priv-mm.waiting_gem_seqno = seqno;
i915_user_irq_get(dev);
- ret = wait_event_interruptible(dev_priv-irq_queue,
-
i915_seqno_passed(i915_get_gem_seqno(dev),
-seqno) ||
- dev_priv-mm.wedged);
+ if (interruptible)
+ ret = wait_event_interruptible(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+ else
+ wait_event(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+
i915_user_irq_put(dev);
dev_priv-mm.waiting_gem_seqno = 0;
}
@@ -1775,6 +1778,34 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno)
return ret;
}
+/**
+ * Waits for a sequence number to be signaled, and cleans up the
+ * request and object lists appropriately for that event.
+ */
+static int
+i915_wait_request(struct drm_device *dev, uint32_t seqno)
+{
+ return i915_do_wait_request(dev, seqno, 1);
+}
+
+/**
+ * Waits for the ring to finish up to the latest request. Usefull for waiting
+ * for flip events, e.g for the overlay support. */
+int i915_lp_ring_sync(struct drm_device *dev)
+{
+ uint32_t seqno;
+ int ret;
+
+ seqno = i915_add_request(dev, NULL, 0);
+
+ if (seqno == 0)
+ return -ENOMEM;
+
+ ret = i915_do_wait_request(dev, seqno, 0);
+ BUG_ON(ret == -ERESTARTSYS);
+ return ret;
+}
+
static void
i915_gem_flush(struct drm_device *dev,
uint32_t invalidate_domains,
@@ -1841,7 +1872,7 @@ i915_gem_flush(struct drm_device *dev,
#endif
BEGIN_LP_RING(2);
OUT_RING(cmd);
- OUT_RING(0); /* noop */
+ OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
}
}
diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h
index 26641e9..3933691 100644
--- a/include/drm/drm_os_linux.h
+++ b/include/drm/drm_os_linux.h
@@ -123,5 +123,5 @@ do {
\
remove_wait_queue((queue), entry);\
} while (0)
-#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
+#define DRM_WAKEUP( queue ) wake_up( queue )
#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
--
1.6.3.3
--
Let Crystal
[PATCH 3/6] [drm/i915]: modeset: always set intel_crtc-dpms_mode
... by moving the assignment up. Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/intel_display.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bb59356..818c703 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1581,6 +1581,8 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode) else i9xx_crtc_dpms(crtc, mode); + intel_crtc-dpms_mode = mode; + if (!dev-primary-master) return; @@ -1603,8 +1605,6 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode) DRM_ERROR(Can't update pipe %d in SAREA\n, pipe); break; } - - intel_crtc-dpms_mode = mode; } static void intel_crtc_prepare (struct drm_crtc *crtc) -- 1.6.3.3 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 1/6] [drm]: make drm_mode_object_find typesafe
I've wasted half a day hunting a bug that could easily be spotted by
gcc. Prevent this from reoccurring.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_crtc.c |3 ++-
include/drm/drm_crtc.h |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 33be210..addb09d 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -243,7 +243,8 @@ static void drm_mode_object_put(struct drm_device *dev,
mutex_unlock(dev-mode_config.idr_mutex);
}
-void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type)
+struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type)
{
struct drm_mode_object *obj = NULL;
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 7300fb8..1946d42 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -691,7 +691,8 @@ extern void drm_mode_connector_detach_encoder(struct
drm_connector *connector,
struct drm_encoder *encoder);
extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
int gamma_size);
-extern void *drm_mode_object_find(struct drm_device *dev, uint32_t id,
uint32_t type);
+extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type);
/* IOCTLs */
extern int drm_mode_getresources(struct drm_device *dev,
void *data, struct drm_file *file_priv);
--
1.6.3.3
--
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[PATCH 6/6] [drm/i915] implement drmmode overlay support
Open issues:
- Flickering. But when the frame is not changed, this stabilizes
after a few seconds (at most).
- Runs in sync with the gpu, i.e. unnecessary waiting. Unfortunately
changes in this area tend to hang the hw, so let's leave it at this
for the moment. I left some dummy functions as infrastructure.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/i915_dma.c |7 +
drivers/gpu/drm/i915/i915_drv.h |4 +
drivers/gpu/drm/i915/i915_reg.h |5 +
drivers/gpu/drm/i915/intel_display.c | 26 +-
drivers/gpu/drm/i915/intel_drv.h | 30 +
drivers/gpu/drm/i915/intel_overlay.c | 1289 ++
include/drm/i915_drm.h | 71 ++
8 files changed, 1430 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_overlay.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 30d6b99..d06fece 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -22,6 +22,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
intel_fb.o \
intel_tv.o \
intel_dvo.o \
+ intel_overlay.o \
dvo_ch7xxx.o \
dvo_ch7017.o \
dvo_ivch.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 50d1f78..7763967 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -777,6 +777,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
case I915_PARAM_NUM_FENCES_AVAIL:
value = dev_priv-num_fence_regs - dev_priv-fence_reg_start;
break;
+ case I915_PARAM_HAS_OVERLAY:
+ value = dev_priv-overlay ? 1 : 0;
+ break;
default:
DRM_DEBUG_DRIVER(I915_DRV, Unknown parameter %d\n,
param-param);
@@ -1310,6 +1313,8 @@ int i915_driver_unload(struct drm_device *dev)
mutex_unlock(dev-struct_mutex);
drm_mm_takedown(dev_priv-vram);
i915_gem_lastclose(dev);
+
+ intel_cleanup_overlay(dev);
}
kfree(dev-dev_private);
@@ -1416,6 +1421,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl,
0),
DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID,
intel_get_pipe_from_crtc_id, 0),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image,
DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs,
DRM_MASTER|DRM_CONTROL_ALLOW),
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2d79ede..19dd7c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -149,6 +149,7 @@ struct drm_i915_error_state {
struct timeval time;
};
+struct intel_overlay;
typedef struct drm_i915_private {
struct drm_device *dev;
@@ -206,6 +207,9 @@ typedef struct drm_i915_private {
struct intel_opregion opregion;
+ /* overlay */
+ struct intel_overlay *overlay;
+
/* LVDS info */
int backlight_duty_cycle; /* restore backlight to this value */
bool panel_wants_dither;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2955083..7bb6e88 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -116,6 +116,7 @@
#define MI_NOOPMI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
+#define MI_WAIT_FOR_OVERLAY_FLIP (116)
#define MI_WAIT_FOR_PLANE_B_FLIP (16)
#define MI_WAIT_FOR_PLANE_A_FLIP (12)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (11)
@@ -127,6 +128,10 @@
#define MI_END_SCENE (1 4) /* flush binner and incr scene count */
#define MI_BATCH_BUFFER_ENDMI_INSTR(0x0a, 0)
#define MI_REPORT_HEAD MI_INSTR(0x07, 0)
+#define MI_OVERLAY_FLIPMI_INSTR(0x11,0)
+#define MI_OVERLAY_CONTINUE (0x021)
+#define MI_OVERLAY_ON(0x121)
+#define MI_OVERLAY_OFF (0x221)
#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
#define MI_MEM_VIRTUAL (1 22) /* 965+ only */
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cb709b8..d2ddcbd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1463,6 +1463,22 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int
mode)
}
}
+static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)
+{
+ struct intel_overlay
[PATCH 6/6] [drm/i915] implement drmmode overlay support v2
Open issues:
- Flickering. But when the frame is not changed, this stabilizes
after a few seconds (at most). This is in a 855GM and a 865G, other
chipset variants are untested.
- Runs in sync with the gpu, i.e. unnecessary waiting. Unfortunately
changes in this area tend to hang the hw, so let's leave it at this
for the moment. I left some dummy functions as infrastructure.
Changes since v1:
- fix off-by-one misconception on my side. This fixes fullscreen
playback.
Tested-By: diego.abele...@gmail.com (on a 865G)
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/i915_dma.c |7 +
drivers/gpu/drm/i915/i915_drv.h |4 +
drivers/gpu/drm/i915/i915_reg.h |5 +
drivers/gpu/drm/i915/intel_display.c | 26 +-
drivers/gpu/drm/i915/intel_drv.h | 30 +
drivers/gpu/drm/i915/intel_overlay.c | 1284 ++
include/drm/i915_drm.h | 71 ++
8 files changed, 1425 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_overlay.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 30d6b99..d06fece 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -22,6 +22,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
intel_fb.o \
intel_tv.o \
intel_dvo.o \
+ intel_overlay.o \
dvo_ch7xxx.o \
dvo_ch7017.o \
dvo_ivch.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 50d1f78..7763967 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -777,6 +777,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
case I915_PARAM_NUM_FENCES_AVAIL:
value = dev_priv-num_fence_regs - dev_priv-fence_reg_start;
break;
+ case I915_PARAM_HAS_OVERLAY:
+ value = dev_priv-overlay ? 1 : 0;
+ break;
default:
DRM_DEBUG_DRIVER(I915_DRV, Unknown parameter %d\n,
param-param);
@@ -1310,6 +1313,8 @@ int i915_driver_unload(struct drm_device *dev)
mutex_unlock(dev-struct_mutex);
drm_mm_takedown(dev_priv-vram);
i915_gem_lastclose(dev);
+
+ intel_cleanup_overlay(dev);
}
kfree(dev-dev_private);
@@ -1416,6 +1421,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl,
0),
DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID,
intel_get_pipe_from_crtc_id, 0),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image,
DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs,
DRM_MASTER|DRM_CONTROL_ALLOW),
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2d79ede..19dd7c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -149,6 +149,7 @@ struct drm_i915_error_state {
struct timeval time;
};
+struct intel_overlay;
typedef struct drm_i915_private {
struct drm_device *dev;
@@ -206,6 +207,9 @@ typedef struct drm_i915_private {
struct intel_opregion opregion;
+ /* overlay */
+ struct intel_overlay *overlay;
+
/* LVDS info */
int backlight_duty_cycle; /* restore backlight to this value */
bool panel_wants_dither;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2955083..7bb6e88 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -116,6 +116,7 @@
#define MI_NOOPMI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
+#define MI_WAIT_FOR_OVERLAY_FLIP (116)
#define MI_WAIT_FOR_PLANE_B_FLIP (16)
#define MI_WAIT_FOR_PLANE_A_FLIP (12)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (11)
@@ -127,6 +128,10 @@
#define MI_END_SCENE (1 4) /* flush binner and incr scene count */
#define MI_BATCH_BUFFER_ENDMI_INSTR(0x0a, 0)
#define MI_REPORT_HEAD MI_INSTR(0x07, 0)
+#define MI_OVERLAY_FLIPMI_INSTR(0x11,0)
+#define MI_OVERLAY_CONTINUE (0x021)
+#define MI_OVERLAY_ON(0x121)
+#define MI_OVERLAY_OFF (0x221)
#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
#define MI_MEM_VIRTUAL (1 22) /* 965+ only */
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cb709b8..d2ddcbd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
Re: [PATCH 6/6] [drm/i915] implement drmmode overlay support v2
Hi Thomas, On Mon, Aug 31, 2009 at 11:34:00AM +0200, Thomas Hellström wrote: Hi, Is there any way we can try and put together a generic drm interface for this instead of an Intel-specific one? I've tried to make the ioctl somewhat generic. That's the reason for the generic buffer format flags (and the corresponding mapping to/from intel overlay formats in kernel and ddx). So when the radeon devs are interested in overlay support, there shouldn't be a big problem in distilling a common ioctl interface. But I don't see the point in a generic ioctl, because there are quite a lot of hw specific restrictions (alignment, stride for all possible yuv formats, ...) which a generic userspace driver would not know. See intel_overlay_put_image in i915/intel_overlay.c for all the checks. A few of these tests are buffer format specific and can certainly be extracted and reused as helper functions, but besides that I don't see much code to share. Moreover we most likely still need a device specific ioctl to adjust color parameters (gamma, yuv-rbg mapping, ...). I also don't see any gain in adding overlay support to the generic struct drm_crtc because handling this crtc-overlay relation is just a few lines in my code. So not many opportunities to share stuff. Surely it will have a use for the Gallium Xorg state-tracker which is intended to be a device-independent Xorg driver on top of KMS and Gallium. At least for intel this does not make sense. Gallium is only supported for 915 and onwards. So is textured video. Which leaves us with 8xx class hw in need of overlay support but no way of gallium support (no shaders). Furthermore I don't think it's a good idea to spoil the shiny new X architecture with support for archaic hardware like overlays (which ruins every compositioned desktop experience). In conclusion I don't think a common ioctl is worth it. But sharing some code and infrastructure on the kernel side is certainly possible, if someone implements overlay support for another chipset. But I don't really count on that, because at least radeon has textured video for all it's chips. /Thomas Yours, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 6/6] [drm/i915] implement drmmode overlay support v2
On Mon, Aug 31, 2009 at 02:15:15PM +0200, Stephane Marchesin wrote: 2009/8/31 Thomas Hellström tho...@shipmail.org: Daniel Vetter wrote: ... In conclusion I don't think a common ioctl is worth it. But sharing some code and infrastructure on the kernel side is certainly possible, if someone implements overlay support for another chipset. But I don't really count on that, because at least radeon has textured video for all it's chips. I understand your concerns about the new X architecture where everything is composited, and I admit I haven't looked through your patch in detail. However, we'll _probably_ need to add overlay support to the Xorg gallium + KMS state-tracker shortly, and if so, with that a generic KMS interface that is sufficient to implement a simple Xv overlay adaptor with KMS. Is this some new (embedded) hw support your working on (that supports gallium), Thomas? Or why do you think gallium needs overlay support? Given the fact that Xv and various virtual device overlay support implementations exist, I assume there *must* be a way to do this generically. Perhaps not in the interest of sharing kernel code, but in the interest of a single user-space interface and a single user-space implementation supporting multiple hardware drivers. I've looked at this before, and you basically end up adding something similar to the Xv API in the kernel (for handling pixel formats, size pitch limitations, vsyncing, ...). I'm not sure it's worth it, especially since overlays are doomed. Of course overlays are faster than textured/blitter video so it's worth implementing, but I'd keep this as a device-specific ioctl. Stephane The problem I see with Xv-API-in-kernel is that of the various hw constrains on the buffer layout. IMHO this has two solutions: a) complicated to communicate the constrains to userspace. This is either to generic or not suitable for everything. b) one fixed format. If it does not fit, just copy the stuff in the right format into a new bo. This is what the intel Xv driver does at the moment. I don't think this belongs into the kernel. In short I think it's best to do the impedance matching in userspace. We would need something there anyway to match the various video APIs onto the kernel model. Yours, Daniel btw: I don't think we can sketch out a common interface before we have a second implementation to go pattern hunting. -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 6/6] [drm/i915] implement drmmode overlay support v2
On Tue, Sep 01, 2009 at 10:56:18AM -0400, Alex Deucher wrote: I'm failing to see why we need an overlay ioctl at all. You end up pulling a relatively large amount of state setup into the drm. Why not treat the overlay like EXA or textured video or 3D? The overlay regs are pipelined on most chips so you can program them from command buffers. Just convert the overlay code in the ddx to use gem/ttm and build an appropriate command buffer or in the case of gallium add overlay support in the device specific code and use gem/ttm, etc.. You could even use it to support GL overlays. Actually that seems to be the original idea, at least there was already some infrastructure in the driver to support this path. The problem is that at least on intel, the overlay hw is _very_ fragile and you can easily hang the complete chip. To prevent this a delicate dance is needed, carefully sync with the crtc output state. So at least on intel, some overlay support on the kernel side is needed to at least prevent race conditions that may hang the chip. Alex Yours, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: 079 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 6/6] [drm/i915] implement drmmode overlay support v2
On Mon, Aug 31, 2009 at 02:58:15PM +0200, Thomas Hellström wrote: ... Is this some new (embedded) hw support your working on (that supports gallium), Thomas? Or why do you think gallium needs overlay support? I must stress this is not Gallium. It's the Xorg state-tracker that uses Gallium for acceleration and KMS for modesetting. We want to leverage that to a usable state for an application where we probably can't drop previous (overlay) capabilities. Textured Xv adaptors of course goes through Gallium, Overlay needs to go through KMS. That's what I've ment, I've just phrased it badly. The other possible use I can see is for embedded devices where power is a big concern, but that's nothing we're involved in ATM. I do think, however, that overlays are going to live on for a while in those devices. IMHO we need a video pipe object in gallium anyway to support all the special power efficient hw in embedded devices. In combination with a gallium video state tracker for a modern api this should give us awesome video on embedded devices /wishful dreaming Given the fact that Xv and various virtual device overlay support implementations exist, I assume there *must* be a way to do this generically. Perhaps not in the interest of sharing kernel code, but in the interest of a single user-space interface and a single user-space implementation supporting multiple hardware drivers. I've looked at this before, and you basically end up adding something similar to the Xv API in the kernel (for handling pixel formats, size pitch limitations, vsyncing, ...). I'm not sure it's worth it, especially since overlays are doomed. Of course overlays are faster than textured/blitter video so it's worth implementing, but I'd keep this as a device-specific ioctl. Stephane The problem I see with Xv-API-in-kernel is that of the various hw constrains on the buffer layout. IMHO this has two solutions: a) complicated to communicate the constrains to userspace. This is either to generic or not suitable for everything. IIRC Xv exposes this all the way down to the user-app, as format and then offset into buffer + stride for each plane? Nope, Xv has one fixed format with stride == line length. Atm, the intel driver unconditionally copies the planes from a userspace buffer into a bo (with correct stride, rotation applied, ...). That's also why I think Xv is not really worth too much trouble because it hands memory pointers and not bo's to the driver. (Which btw results in some _very_ ugly hacks to achieve zero-copy XvMC by assuming that the pointer handed in by the client-side libXvMC is just a GART offset ... This obviously doesn't work with bo relocating/kms) b) one fixed format. If it does not fit, just copy the stuff in the right format into a new bo. This is what the intel Xv driver does at the moment. I don't think this belongs into the kernel. Agreed. It's not a problem to implement this in a generic user-space driver. As I've already said I think the way forward is gallium-video state tracker (and not Xv). This way we can ensure that the draw module (via shaders/software) or the hw render the frames with the right constrains directly into bo's. This way we can omit the atm inevitable copy that the Xv api forces upon drivers. This should also be usable for embedded devices with low-power overlay and dedicated video pipelines. One small thing to keep in mind: To make this video state tracker on gallium thing work we probably need to extend the DRI2 proto such that X can work as an arbiter for the overlay. ... btw: I don't think we can sketch out a common interface before we have a second implementation to go pattern hunting. OK. We're probably some time away on this. Fine. I'll just push this then as a device ioctl to bring usable video on 8xx to kms. Thanks, /Thomas Thanks, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: 079 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 6/6] [drm/i915] implement drmmode overlay support v2
On Tue, Sep 01, 2009 at 10:01:24PM -0700, Corbin Simpson wrote: Then have an Intel-specific bit of code. Do a batchbuffer checker/relocator/munger; we've got one for Radeons, and I'm sure you guys need to do something similar for relocating BOs. That's actually what I originally wanted to do. But you have to do so many checks of the parameters, it's unfunny. And the magic dance to do state changes on the overlay hw (somethings needs changing crtc output and reverting it afterwards) is also quite complicated. So I wouldn't really be able to drop that much code, if anything at all. And instead I'd have an interface in command buffer submission that looks an awfull lot like an very special purpose ioctl in disguise. So I went down that road and created a _real_ ioctl with well-defined semantics. ~ C. Yours, Daniel btw: intel hw has some nice support for executing untrusted batchbuffers, so no monsterous checker/relocater/munger already present. -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: 079 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 1/5] [drm]: make drm_mode_object_find typesafe
I've wasted half a day hunting a bug that could easily be spotted by
gcc. Prevent this from reoccurring.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_crtc.c |3 ++-
include/drm/drm_crtc.h |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index ba728ad..78eeec7 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -247,7 +247,8 @@ static void drm_mode_object_put(struct drm_device *dev,
mutex_unlock(dev-mode_config.idr_mutex);
}
-void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type)
+struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type)
{
struct drm_mode_object *obj = NULL;
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index ae1e9e1..f4c0fbc 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -699,7 +699,8 @@ extern void drm_mode_connector_detach_encoder(struct
drm_connector *connector,
struct drm_encoder *encoder);
extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
int gamma_size);
-extern void *drm_mode_object_find(struct drm_device *dev, uint32_t id,
uint32_t type);
+extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type);
/* IOCTLs */
extern int drm_mode_getresources(struct drm_device *dev,
void *data, struct drm_file *file_priv);
--
1.6.3.3
--
Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day
trial. Simplify your report design, integration and deployment - and focus on
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--
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[PATCH 2/5] [drm/i915]: require_pipe_a helper functions
These will be used to ensure that the clock of pipe a is running
when the overlay is switched on. Programming logic more or less
directly ported over from userspace.
Also export the already existing helper function drm_encoder_crtc_ok.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_crtc_helper.c|3 +-
drivers/gpu/drm/i915/intel_display.c | 83 ++
drivers/gpu/drm/i915/intel_drv.h |5 ++
include/drm/drm_crtc_helper.h|2 +
4 files changed, 92 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index ff447f1..13afdfe 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -488,7 +488,7 @@ static void drm_setup_crtcs(struct drm_device *dev)
*
* Return false if @encoder can't be driven by @crtc, true otherwise.
*/
-static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
+bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
struct drm_crtc *crtc)
{
struct drm_device *dev;
@@ -509,6 +509,7 @@ static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
return true;
return false;
}
+EXPORT_SYMBOL(drm_encoder_crtc_ok);
/*
* Check the CRTC we're going to map each output to vs. its current
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 155719f..d0a74e5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3069,6 +3069,89 @@ void intel_release_load_detect_pipe(struct intel_output
*intel_output, int dpms_
}
}
+/** Ensure that pipe A is enabled. Returns the crtc that runs pipe A or NULL
+ * if pipe A is already enabled */
+struct drm_crtc *intel_require_pipe_a_start(struct drm_device *dev,
+ int *dpms_mode)
+{
+ struct drm_crtc *crtc;
+ struct intel_crtc *intel_crtc;
+ struct drm_connector *connector;
+ struct drm_crtc_helper_funcs *crtc_funcs;
+ struct intel_output *intel_output;
+
+ crtc = intel_get_crtc_from_pipe(dev, 0);
+ intel_crtc = to_intel_crtc(crtc);
+ BUG_ON(intel_crtc-pipe != 0);
+
+ if (crtc-enabled intel_crtc-dpms_mode == DRM_MODE_DPMS_ON)
+ return NULL;
+
+ DRM_DEBUG(i915: require PIPEA, switching on crtc ...\n);
+
+ *dpms_mode = intel_crtc-dpms_mode;
+
+ if (crtc-enabled intel_crtc-dpms_mode != DRM_MODE_DPMS_ON) {
+ /* just switch it on */
+ crtc_funcs = crtc-helper_private;
+ crtc_funcs-dpms(crtc, DRM_MODE_DPMS_ON);
+
+ return crtc;
+ }
+
+ if (!drm_helper_crtc_in_use(crtc)) {
+ /* look for an encoder/connector */
+ list_for_each_entry(connector,
+ dev-mode_config.connector_list, head) {
+ intel_output = to_intel_output(connector);
+
+ if (intel_output-enc.crtc)
+ /* don't steal connectors */
+ continue;
+
+ if (!drm_encoder_crtc_ok(intel_output-enc, crtc))
+ continue;
+
+ intel_output-enc.crtc = crtc;
+ break;
+ }
+ }
+
+ drm_crtc_helper_set_mode(crtc, load_detect_mode, 0, 0, crtc-fb);
+ WARN_ON(!crtc-enabled);
+
+ return crtc;
+}
+
+void intel_require_pipe_a_end(struct drm_device *dev,
+ struct drm_crtc *crtc,
+ int dpms_mode)
+{
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ struct drm_encoder *encoder;
+ struct drm_crtc_helper_funcs *crtc_funcs;
+
+ if (!crtc)
+ return;
+
+ crtc_funcs = crtc-helper_private;
+
+ DRM_DEBUG(i915: require PIPEA, switching off crtc ...\n);
+
+ /* Switch crtc and output back off if necessary */
+ if (crtc-enabled dpms_mode != DRM_MODE_DPMS_ON) {
+ list_for_each_entry(encoder,
+ dev-mode_config.encoder_list, head) {
+ if (encoder-crtc != crtc)
+ continue;
+ encoder_funcs = encoder-helper_private;
+ encoder_funcs-dpms(encoder, dpms_mode);
+ }
+
+ crtc_funcs-dpms(crtc, dpms_mode);
+ }
+}
+
/* Returns the clock of the currently programmed mode of the given pipe. */
static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b9e47f1..33e6980 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -163,6 +163,11 @@ extern struct drm_crtc *intel_get_load_detect_pipe(struct
intel_output
[PATCH 3/5] [drm/i915]: add i915_lp_ring_sync helper
This just waits until the hw passed the current ring position with
cmd execution. This slightly changes the existing i915_wait_request
function to make uninterruptible waiting possible - no point in
returning to userspace while mucking around with the overlay, that
piece of hw is just too fragile.
Also replace a magic 0 with the symbolic constant (and kill the then
superflous comment) while I was looking at the code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c | 51 +++---
include/drm/drm_os_linux.h |2 +-
3 files changed, 43 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 77ed060..4dfc9d1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -708,6 +708,7 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int i915_gem_do_init(struct drm_device *dev, unsigned long start,
unsigned long end);
int i915_gem_idle(struct drm_device *dev);
+int i915_lp_ring_sync(struct drm_device *dev);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
int write);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 954fb69..00dbc2c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1738,12 +1738,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
mutex_unlock(dev-struct_mutex);
}
-/**
- * Waits for a sequence number to be signaled, and cleans up the
- * request and object lists appropriately for that event.
- */
static int
-i915_wait_request(struct drm_device *dev, uint32_t seqno)
+i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
{
drm_i915_private_t *dev_priv = dev-dev_private;
u32 ier;
@@ -1765,10 +1761,17 @@ i915_wait_request(struct drm_device *dev, uint32_t
seqno)
dev_priv-mm.waiting_gem_seqno = seqno;
i915_user_irq_get(dev);
- ret = wait_event_interruptible(dev_priv-irq_queue,
-
i915_seqno_passed(i915_get_gem_seqno(dev),
-seqno) ||
- dev_priv-mm.wedged);
+ if (interruptible)
+ ret = wait_event_interruptible(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+ else
+ wait_event(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+
i915_user_irq_put(dev);
dev_priv-mm.waiting_gem_seqno = 0;
}
@@ -1790,6 +1793,34 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno)
return ret;
}
+/**
+ * Waits for a sequence number to be signaled, and cleans up the
+ * request and object lists appropriately for that event.
+ */
+static int
+i915_wait_request(struct drm_device *dev, uint32_t seqno)
+{
+ return i915_do_wait_request(dev, seqno, 1);
+}
+
+/**
+ * Waits for the ring to finish up to the latest request. Usefull for waiting
+ * for flip events, e.g for the overlay support. */
+int i915_lp_ring_sync(struct drm_device *dev)
+{
+ uint32_t seqno;
+ int ret;
+
+ seqno = i915_add_request(dev, NULL, 0);
+
+ if (seqno == 0)
+ return -ENOMEM;
+
+ ret = i915_do_wait_request(dev, seqno, 0);
+ BUG_ON(ret == -ERESTARTSYS);
+ return ret;
+}
+
static void
i915_gem_flush(struct drm_device *dev,
uint32_t invalidate_domains,
@@ -1856,7 +1887,7 @@ i915_gem_flush(struct drm_device *dev,
#endif
BEGIN_LP_RING(2);
OUT_RING(cmd);
- OUT_RING(0); /* noop */
+ OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
}
}
diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h
index 26641e9..3933691 100644
--- a/include/drm/drm_os_linux.h
+++ b/include/drm/drm_os_linux.h
@@ -123,5 +123,5 @@ do {
\
remove_wait_queue((queue), entry);\
} while (0)
-#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
+#define DRM_WAKEUP( queue ) wake_up( queue )
#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
--
1.6.3.3
--
Let Crystal
[PATCH 4/5] [drm/i915]: kill superflous IS_I855 macro
It is identical to I85X. Use that one instead.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/intel_display.c |4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4dfc9d1..2573ee0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -845,7 +845,6 @@ extern int i915_wait_ring(struct drm_device * dev, int n,
const char *caller);
#define IS_I830(dev) ((dev)-pci_device == 0x3577)
#define IS_845G(dev) ((dev)-pci_device == 0x2562)
#define IS_I85X(dev) ((dev)-pci_device == 0x3582)
-#define IS_I855(dev) ((dev)-pci_device == 0x3582)
#define IS_I865G(dev) ((dev)-pci_device == 0x2572)
#define IS_I915G(dev) ((dev)-pci_device == 0x2582 || (dev)-pci_device ==
0x258a)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d0a74e5..b85a6cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1741,7 +1741,7 @@ static int intel_get_core_clock_speed(struct drm_device
*dev)
}
} else if (IS_I865G(dev))
return 266000;
- else if (IS_I855(dev)) {
+ else if (IS_I85X(dev)) {
u16 hpllcc = 0;
/* Assume that the hardware is in the high speed state. This
* should be the default.
@@ -3902,7 +3902,7 @@ void intel_init_clock_gating(struct drm_device *dev)
dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |
DSTATE_DOT_CLOCK_GATING;
I915_WRITE(D_STATE, dstate);
- } else if (IS_I855(dev) || IS_I865G(dev)) {
+ } else if (IS_I85X(dev) || IS_I865G(dev)) {
I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
} else if (IS_I830(dev)) {
I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
--
1.6.3.3
--
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--
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[PATCH 5/5] [drm/i915] implement drmmode overlay support v3
This implements intel overlay support for kms via a device-specific
ioctl. Thomas Hellstrom brought up the idea of a general ioctl (on
dri-devel). We've reached the conclusion that such an infrastructure
only makes sense when multiple kms overlay implementations exists,
which atm don't (and it doesn't look like this is gonna change).
Open issues:
- Runs in sync with the gpu, i.e. unnecessary waiting. I've decided
to wait with this because the hw tends to hang when changing something
in this area. I left some dummy functions as infrastructure.
- polyphase filtering uses a static table.
- uses uninterruptible sleeps. Unfortunately the alternatives may
unnecessarily wedged the hw if/when we timeout too early (and
userspace only overloaded the batch buffers with stuff worth a few
secs of gpu time).
Changes since v1:
- fix off-by-one misconception on my side. This fixes fullscreen
playback.
Changes since v2:
- add underrun detection as spec'ed for i965.
- flush caches properly, fixing visual corruptions.
Tested-By: diego.abele...@gmail.com (on a 865G)
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/i915_dma.c |7 +
drivers/gpu/drm/i915/i915_drv.h |4 +
drivers/gpu/drm/i915/i915_reg.h |5 +
drivers/gpu/drm/i915/intel_display.c | 26 +-
drivers/gpu/drm/i915/intel_drv.h | 30 +
drivers/gpu/drm/i915/intel_overlay.c | 1293 ++
include/drm/i915_drm.h | 71 ++
8 files changed, 1434 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_overlay.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5269dfa..b2f030c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -22,6 +22,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
intel_fb.o \
intel_tv.o \
intel_dvo.o \
+ intel_overlay.o \
dvo_ch7xxx.o \
dvo_ch7017.o \
dvo_ivch.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 9909505..5747e4c 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -800,6 +800,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
case I915_PARAM_NUM_FENCES_AVAIL:
value = dev_priv-num_fence_regs - dev_priv-fence_reg_start;
break;
+ case I915_PARAM_HAS_OVERLAY:
+ value = dev_priv-overlay ? 1 : 0;
+ break;
default:
DRM_DEBUG_DRIVER(Unknown parameter %d\n,
param-param);
@@ -1345,6 +1348,8 @@ int i915_driver_unload(struct drm_device *dev)
mutex_unlock(dev-struct_mutex);
drm_mm_takedown(dev_priv-vram);
i915_gem_lastclose(dev);
+
+ intel_cleanup_overlay(dev);
}
pci_dev_put(dev_priv-bridge_dev);
@@ -1452,6 +1457,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl,
0),
DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID,
intel_get_pipe_from_crtc_id, 0),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image,
DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs,
DRM_MASTER|DRM_CONTROL_ALLOW),
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2573ee0..f8edd9d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -148,6 +148,7 @@ struct drm_i915_error_state {
struct timeval time;
};
+struct intel_overlay;
typedef struct drm_i915_private {
struct drm_device *dev;
@@ -206,6 +207,9 @@ typedef struct drm_i915_private {
struct intel_opregion opregion;
+ /* overlay */
+ struct intel_overlay *overlay;
+
/* LVDS info */
int backlight_duty_cycle; /* restore backlight to this value */
bool panel_wants_dither;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e38cd21..690afe2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -135,6 +135,7 @@
#define MI_NOOPMI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
+#define MI_WAIT_FOR_OVERLAY_FLIP (116)
#define MI_WAIT_FOR_PLANE_B_FLIP (16)
#define MI_WAIT_FOR_PLANE_A_FLIP (12)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (11)
@@ -146,6 +147,10 @@
#define MI_END_SCENE (1 4) /* flush binner and incr scene count */
#define MI_BATCH_BUFFER_ENDMI_INSTR(0x0a, 0)
#define MI_REPORT_HEAD MI_INSTR(0x07, 0
[PATCH 0/5] kms overlay support v2
Hi all, Thanks to Jesse's hint I've finally fixed the visual corruptions. Patch series is against latest drm-next. I'll repost the ddx cleanups as soon as 2.9 is out of the door and the drmmode overlay implementation somewhen later, when the kernel side has hit a stable release. I've tried to summarize the outcomes of various discussion in the changelog. Please review and consider for .32. Thanks, Daniel Daniel Vetter (5): [drm]: make drm_mode_object_find typesafe [drm/i915]: require_pipe_a helper functions [drm/i915]: add i915_lp_ring_sync helper [drm/i915]: kill superflous IS_I855 macro [drm/i915] implement drmmode overlay support v3 drivers/gpu/drm/drm_crtc.c |3 +- drivers/gpu/drm/drm_crtc_helper.c|3 +- drivers/gpu/drm/i915/Makefile|1 + drivers/gpu/drm/i915/i915_dma.c |7 + drivers/gpu/drm/i915/i915_drv.h |6 +- drivers/gpu/drm/i915/i915_gem.c | 51 ++- drivers/gpu/drm/i915/i915_reg.h |5 + drivers/gpu/drm/i915/intel_display.c | 113 +++- drivers/gpu/drm/i915/intel_drv.h | 35 + drivers/gpu/drm/i915/intel_overlay.c | 1293 ++ include/drm/drm_crtc.h |3 +- include/drm/drm_crtc_helper.h|2 + include/drm/drm_os_linux.h |2 +- include/drm/i915_drm.h | 71 ++ 14 files changed, 1575 insertions(+), 20 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_overlay.c -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 2/5] [drm/i915]: require_pipe_a helper functions
Hi all, Please ignore this patch because it doesn't work as advertised: a) Under some circumstance it doesn't do what it claims to do. b) When it does what it claims to do it hangs the chip on drm-intel-next. _But_ completely disabling this stuff yields a black screen when enabling the overlay. Looks like I've missed yet another cache flush. I've hacked up a fix which seems to work, here, but I'd like to give it some more testing. Yours, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 0/8] drmmode overlay support v3
Hi all, Latest version of my overlay kms work. I've added the new stuff as separated patches for easier testing in case something blows up. Please review. Thanks, Daniel Daniel Vetter (8): [drm]: make drm_mode_object_find typesafe [drm/i915]: add i915_lp_ring_sync helper [drm/i915]: kill superflous IS_I855 macro [drm/i915] implement drmmode overlay support v4 [drm/i915] fully switch off overlay when not in use [drm/i915] implement fastpath for overlay flip waiting [drm/i915] implement interruptible sleeps in the overlay code [drm/i915] kill i915_lp_ring_sync drivers/gpu/drm/drm_crtc.c |3 +- drivers/gpu/drm/i915/Makefile|1 + drivers/gpu/drm/i915/i915_dma.c |7 + drivers/gpu/drm/i915/i915_drv.h |8 +- drivers/gpu/drm/i915/i915_gem.c | 37 +- drivers/gpu/drm/i915/i915_reg.h |5 + drivers/gpu/drm/i915/intel_display.c | 45 +- drivers/gpu/drm/i915/intel_drv.h | 39 + drivers/gpu/drm/i915/intel_overlay.c | 1420 ++ include/drm/drm_crtc.h |3 +- include/drm/drm_os_linux.h |2 +- include/drm/i915_drm.h | 71 ++ 12 files changed, 1620 insertions(+), 21 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_overlay.c -- Come build with us! The BlackBerryreg; Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9#45;12, 2009. Register now#33; http://p.sf.net/sfu/devconf -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 4/8] [drm/i915] implement drmmode overlay support v4
This implements intel overlay support for kms via a device-specific
ioctl. Thomas Hellstrom brought up the idea of a general ioctl (on
dri-devel). We've reached the conclusion that such an infrastructure
only makes sense when multiple kms overlay implementations exists,
which atm don't (and it doesn't look like this is gonna change).
Open issues:
- Runs in sync with the gpu, i.e. unnecessary waiting. I've decided
to wait on this because the hw tends to hang when changing something
in this area. I left some dummy functions as infrastructure.
- polyphase filtering uses a static table.
- uses uninterruptible sleeps. Unfortunately the alternatives may
unnecessarily wedged the hw if/when we timeout too early (and
userspace only overloaded the batch buffers with stuff worth a few
secs of gpu time).
Changes since v1:
- fix off-by-one misconception on my side. This fixes fullscreen
playback.
Changes since v2:
- add underrun detection as spec'ed for i965.
- flush caches properly, fixing visual corruptions.
Changes since v4:
- fix up cache flushing of overlay memory regs.
- killed require_pipe_a logic - it hangs the chip.
Tested-By: diego.abele...@gmail.com (on a 865G)
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/i915_dma.c |7 +
drivers/gpu/drm/i915/i915_drv.h |4 +
drivers/gpu/drm/i915/i915_reg.h |5 +
drivers/gpu/drm/i915/intel_display.c | 26 +-
drivers/gpu/drm/i915/intel_drv.h | 30 +
drivers/gpu/drm/i915/intel_overlay.c | 1293 ++
include/drm/i915_drm.h | 71 ++
8 files changed, 1434 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_overlay.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5269dfa..b2f030c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -22,6 +22,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
intel_fb.o \
intel_tv.o \
intel_dvo.o \
+ intel_overlay.o \
dvo_ch7xxx.o \
dvo_ch7017.o \
dvo_ivch.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5a6b731..146655b 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -800,6 +800,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
case I915_PARAM_NUM_FENCES_AVAIL:
value = dev_priv-num_fence_regs - dev_priv-fence_reg_start;
break;
+ case I915_PARAM_HAS_OVERLAY:
+ value = dev_priv-overlay ? 1 : 0;
+ break;
default:
DRM_DEBUG_DRIVER(Unknown parameter %d\n,
param-param);
@@ -1498,6 +1501,8 @@ int i915_driver_unload(struct drm_device *dev)
mutex_unlock(dev-struct_mutex);
drm_mm_takedown(dev_priv-vram);
i915_gem_lastclose(dev);
+
+ intel_cleanup_overlay(dev);
}
pci_dev_put(dev_priv-bridge_dev);
@@ -1605,6 +1610,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl,
0),
DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID,
intel_get_pipe_from_crtc_id, 0),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image,
DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs,
DRM_MASTER|DRM_CONTROL_ALLOW),
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e5683e..d31198b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -153,6 +153,7 @@ struct drm_i915_error_state {
struct timeval time;
};
+struct intel_overlay;
typedef struct drm_i915_private {
struct drm_device *dev;
@@ -216,6 +217,9 @@ typedef struct drm_i915_private {
struct intel_opregion opregion;
+ /* overlay */
+ struct intel_overlay *overlay;
+
/* LVDS info */
int backlight_duty_cycle; /* restore backlight to this value */
bool panel_wants_dither;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f7c2de8..88c6884 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -135,6 +135,7 @@
#define MI_NOOPMI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
+#define MI_WAIT_FOR_OVERLAY_FLIP (116)
#define MI_WAIT_FOR_PLANE_B_FLIP (16)
#define MI_WAIT_FOR_PLANE_A_FLIP (12)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (11)
@@ -146,6 +147,10 @@
#define MI_END_SCENE (1 4) /* flush binner and incr
[PATCH 7/8] [drm/i915] implement interruptible sleeps in the overlay code
At least for the common case of userspace ioctls. When doing a
modeset operation, the wait is still uninterruptible. But considering
that failing to turn off the overlay when switching off the crtc it's
running on hangs the chip, it doesn't complicate matters _very_
much. There's just an unkillable X in addition to a black screen.
BUG() about it and explain in the code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 17 +++-
drivers/gpu/drm/i915/intel_drv.h |9 ++-
drivers/gpu/drm/i915/intel_overlay.c | 167 +++---
3 files changed, 159 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 19773c9..3112bf3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1703,11 +1703,26 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int
mode)
static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)
{
struct intel_overlay *overlay;
+ int ret;
if (!enable intel_crtc-overlay) {
overlay = intel_crtc-overlay;
mutex_lock(overlay-dev-struct_mutex);
- intel_overlay_switch_off(overlay);
+ for (;;) {
+ ret = intel_overlay_switch_off(overlay);
+ if (ret == 0)
+ break;
+
+ ret = intel_overlay_recover_from_interrupt(overlay, 0);
+ if (ret != 0) {
+ /* overlay doesn't react anymore. Usually
+* results in a black screen and an unkillable
+* X server. */
+ BUG();
+ overlay-hw_wedged = HW_WEDGED;
+ break;
+ }
+ }
mutex_unlock(overlay-dev-struct_mutex);
}
/* Let userspace switch the overlay on again. In most cases userspace
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9eea5c7..8a0fddf 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -126,8 +126,13 @@ struct intel_overlay {
struct drm_i915_gem_object *reg_bo;
void *virt_addr;
/* flip handling */
- int hw_wedged;
uint32_t last_flip_req;
+ int hw_wedged;
+#define HW_WEDGED 1
+#define NEEDS_WAIT_FOR_FLIP2
+#define RELEASE_OLD_VID3
+#define SWITCH_OFF_STAGE_1 4
+#define SWITCH_OFF_STAGE_2 5
};
struct intel_crtc {
@@ -207,6 +212,8 @@ extern int intel_framebuffer_create(struct drm_device *dev,
extern void intel_setup_overlay(struct drm_device *dev);
extern void intel_cleanup_overlay(struct drm_device *dev);
extern int intel_overlay_switch_off(struct intel_overlay *overlay);
+extern int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
+ int interruptible);
extern int intel_overlay_put_image(struct drm_device *dev, void *data,
struct drm_file *file_priv);
extern int intel_overlay_attrs(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/gpu/drm/i915/intel_overlay.c
index 85e07e4..972d715 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -222,6 +222,9 @@ static int intel_overlay_on(struct intel_overlay *overlay)
BUG_ON(overlay-active);
+ overlay-active = 1;
+ overlay-hw_wedged = NEEDS_WAIT_FOR_FLIP;
+
BEGIN_LP_RING(6);
OUT_RING(MI_FLUSH);
OUT_RING(MI_NOOP);
@@ -231,15 +234,16 @@ static int intel_overlay_on(struct intel_overlay *overlay)
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- ret = i915_lp_ring_sync(dev);
- if (ret != 0) {
- DRM_ERROR(intel overlay: ring sync failed, hw likely
wedged\n);
- overlay-hw_wedged = 1;
- return 0;
- }
+ overlay-last_flip_req = i915_add_request(dev, NULL, 0);
+ if (overlay-last_flip_req == 0)
+ return -ENOMEM;
- overlay-active = 1;
+ ret = i915_do_wait_request(dev, overlay-last_flip_req, 1);
+ if (ret != 0)
+ return ret;
+ overlay-hw_wedged = 0;
+ overlay-last_flip_req = 0;
return 0;
}
@@ -283,7 +287,6 @@ static int intel_overlay_wait_flip(struct intel_overlay
*overlay)
if (overlay-last_flip_req != 0) {
ret = i915_do_wait_request(dev, overlay-last_flip_req, 0);
-
if (ret != 0)
return ret;
@@ -296,19 +299,24 @@ static int intel_overlay_wait_flip(struct intel_overlay
*overlay)
}
/* synchronous slowpath */
+ overlay-hw_wedged
[PATCH 1/8] [drm]: make drm_mode_object_find typesafe
I've wasted half a day hunting a bug that could easily be spotted by
gcc. Prevent this from reoccurring.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_crtc.c |3 ++-
include/drm/drm_crtc.h |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index ba728ad..78eeec7 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -247,7 +247,8 @@ static void drm_mode_object_put(struct drm_device *dev,
mutex_unlock(dev-mode_config.idr_mutex);
}
-void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type)
+struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type)
{
struct drm_mode_object *obj = NULL;
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index ae1e9e1..f4c0fbc 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -699,7 +699,8 @@ extern void drm_mode_connector_detach_encoder(struct
drm_connector *connector,
struct drm_encoder *encoder);
extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
int gamma_size);
-extern void *drm_mode_object_find(struct drm_device *dev, uint32_t id,
uint32_t type);
+extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+ uint32_t id, uint32_t type);
/* IOCTLs */
extern int drm_mode_getresources(struct drm_device *dev,
void *data, struct drm_file *file_priv);
--
1.6.3.3
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[PATCH 3/8] [drm/i915]: kill superflous IS_I855 macro
It is identical to I85X. Use that one instead.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/intel_display.c |4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0327ecf..7e5683e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -858,7 +858,6 @@ extern int i915_wait_ring(struct drm_device * dev, int n,
const char *caller);
#define IS_I830(dev) ((dev)-pci_device == 0x3577)
#define IS_845G(dev) ((dev)-pci_device == 0x2562)
#define IS_I85X(dev) ((dev)-pci_device == 0x3582)
-#define IS_I855(dev) ((dev)-pci_device == 0x3582)
#define IS_I865G(dev) ((dev)-pci_device == 0x2572)
#define IS_I915G(dev) ((dev)-pci_device == 0x2582 || (dev)-pci_device ==
0x258a)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cadb9ef..7294a8f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1922,7 +1922,7 @@ static int intel_get_core_clock_speed(struct drm_device
*dev)
}
} else if (IS_I865G(dev))
return 266000;
- else if (IS_I855(dev)) {
+ else if (IS_I85X(dev)) {
u16 hpllcc = 0;
/* Assume that the hardware is in the high speed state. This
* should be the default.
@@ -4019,7 +4019,7 @@ void intel_init_clock_gating(struct drm_device *dev)
dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |
DSTATE_DOT_CLOCK_GATING;
I915_WRITE(D_STATE, dstate);
- } else if (IS_I855(dev) || IS_I865G(dev)) {
+ } else if (IS_I85X(dev) || IS_I865G(dev)) {
I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
} else if (IS_I830(dev)) {
I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
--
1.6.3.3
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[PATCH 6/8] [drm/i915] implement fastpath for overlay flip waiting
As long as the gpu can keep up, neither the cpu (waiting for gpu)
nore the gpu (waiting for vblank to do an overlay flip) stalls.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |3 ++
drivers/gpu/drm/i915/i915_gem.c |4 +-
drivers/gpu/drm/i915/intel_drv.h |2 +
drivers/gpu/drm/i915/intel_overlay.c | 43 ++---
4 files changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d31198b..8b17942 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -724,6 +724,9 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int i915_gem_do_init(struct drm_device *dev, unsigned long start,
unsigned long end);
int i915_gem_idle(struct drm_device *dev);
+uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
+ uint32_t flush_domains);
+int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int
interruptible);
int i915_lp_ring_sync(struct drm_device *dev);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a3d8fa8..4793766 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1518,7 +1518,7 @@ i915_gem_object_move_to_inactive(struct drm_gem_object
*obj)
*
* Returned sequence numbers are nonzero on success.
*/
-static uint32_t
+uint32_t
i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
uint32_t flush_domains)
{
@@ -1738,7 +1738,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
mutex_unlock(dev-struct_mutex);
}
-static int
+int
i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
{
drm_i915_private_t *dev_priv = dev-dev_private;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f84a0cf..9eea5c7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -125,7 +125,9 @@ struct intel_overlay {
u32 flip_addr;
struct drm_i915_gem_object *reg_bo;
void *virt_addr;
+ /* flip handling */
int hw_wedged;
+ uint32_t last_flip_req;
};
struct intel_crtc {
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/gpu/drm/i915/intel_overlay.c
index 4e88abb..85e07e4 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -251,7 +251,6 @@ static void intel_overlay_continue(struct intel_overlay
*overlay,
drm_i915_private_t *dev_priv = dev-dev_private;
u32 flip_addr = overlay-flip_addr;
u32 tmp;
- int ret;
RING_LOCALS;
BUG_ON(!overlay-active);
@@ -264,11 +263,40 @@ static void intel_overlay_continue(struct intel_overlay
*overlay,
if (tmp (1 17))
DRM_DEBUG(overlay underrun, DOVSTA: %x\n, tmp);
- BEGIN_LP_RING(6);
+ BEGIN_LP_RING(4);
OUT_RING(MI_FLUSH);
OUT_RING(MI_NOOP);
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
OUT_RING(flip_addr);
+ADVANCE_LP_RING();
+
+ overlay-last_flip_req = i915_add_request(dev, NULL, 0);
+}
+
+static int intel_overlay_wait_flip(struct intel_overlay *overlay)
+{
+ struct drm_device *dev = overlay-dev;
+drm_i915_private_t *dev_priv = dev-dev_private;
+ int ret;
+ u32 tmp;
+ RING_LOCALS;
+
+ if (overlay-last_flip_req != 0) {
+ ret = i915_do_wait_request(dev, overlay-last_flip_req, 0);
+
+ if (ret != 0)
+ return ret;
+
+ overlay-last_flip_req = 0;
+
+ tmp = I915_READ(ISR);
+
+ if (!(tmp I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT))
+ return 0;
+ }
+
+ /* synchronous slowpath */
+ BEGIN_LP_RING(2);
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
@@ -279,13 +307,8 @@ static void intel_overlay_continue(struct intel_overlay
*overlay,
DRM_ERROR(intel overlay: ring sync failed, hw likely
wedged\n);
overlay-hw_wedged = 1;
}
-}
-static int intel_overlay_wait_flip(struct intel_overlay *overlay)
-{
- /* don't overcomplicate things for now with asynchronous operations
-* see comment above */
- return 0;
+ return ret;
}
/* overlay needs to be disabled in OCMD reg */
@@ -344,7 +367,9 @@ static int intel_overlay_off(struct intel_overlay *overlay)
return ret;
}
-/* wait for pending overlay flip and release old frame */
+/* Wait for pending overlay flip and release old frame.
+ * Needs to be called before the overlay register are changed
[PATCH 8/8] [drm/i915] kill i915_lp_ring_sync
It's not needed anymore.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/i915_gem.c | 18 --
2 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8b17942..a4fa3e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -727,7 +727,6 @@ int i915_gem_idle(struct drm_device *dev);
uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
uint32_t flush_domains);
int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int
interruptible);
-int i915_lp_ring_sync(struct drm_device *dev);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
int write);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4793766..b1dd1d6 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1803,24 +1803,6 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno)
return i915_do_wait_request(dev, seqno, 1);
}
-/**
- * Waits for the ring to finish up to the latest request. Usefull for waiting
- * for flip events, e.g for the overlay support. */
-int i915_lp_ring_sync(struct drm_device *dev)
-{
- uint32_t seqno;
- int ret;
-
- seqno = i915_add_request(dev, NULL, 0);
-
- if (seqno == 0)
- return -ENOMEM;
-
- ret = i915_do_wait_request(dev, seqno, 0);
- BUG_ON(ret == -ERESTARTSYS);
- return ret;
-}
-
static void
i915_gem_flush(struct drm_device *dev,
uint32_t invalidate_domains,
--
1.6.3.3
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[PATCH 2/8] [drm/i915]: add i915_lp_ring_sync helper
This just waits until the hw passed the current ring position with
cmd execution. This slightly changes the existing i915_wait_request
function to make uninterruptible waiting possible - no point in
returning to userspace while mucking around with the overlay, that
piece of hw is just too fragile.
Also replace a magic 0 with the symbolic constant (and kill the then
superflous comment) while I was looking at the code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c | 51 +++---
include/drm/drm_os_linux.h |2 +-
3 files changed, 43 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0344afd..0327ecf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -720,6 +720,7 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int i915_gem_do_init(struct drm_device *dev, unsigned long start,
unsigned long end);
int i915_gem_idle(struct drm_device *dev);
+int i915_lp_ring_sync(struct drm_device *dev);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
int write);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e0da986..a3d8fa8 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1738,12 +1738,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
mutex_unlock(dev-struct_mutex);
}
-/**
- * Waits for a sequence number to be signaled, and cleans up the
- * request and object lists appropriately for that event.
- */
static int
-i915_wait_request(struct drm_device *dev, uint32_t seqno)
+i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
{
drm_i915_private_t *dev_priv = dev-dev_private;
u32 ier;
@@ -1765,10 +1761,17 @@ i915_wait_request(struct drm_device *dev, uint32_t
seqno)
dev_priv-mm.waiting_gem_seqno = seqno;
i915_user_irq_get(dev);
- ret = wait_event_interruptible(dev_priv-irq_queue,
-
i915_seqno_passed(i915_get_gem_seqno(dev),
-seqno) ||
- dev_priv-mm.wedged);
+ if (interruptible)
+ ret = wait_event_interruptible(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+ else
+ wait_event(dev_priv-irq_queue,
+
i915_seqno_passed(i915_get_gem_seqno(dev),
+seqno) ||
+ dev_priv-mm.wedged);
+
i915_user_irq_put(dev);
dev_priv-mm.waiting_gem_seqno = 0;
}
@@ -1790,6 +1793,34 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno)
return ret;
}
+/**
+ * Waits for a sequence number to be signaled, and cleans up the
+ * request and object lists appropriately for that event.
+ */
+static int
+i915_wait_request(struct drm_device *dev, uint32_t seqno)
+{
+ return i915_do_wait_request(dev, seqno, 1);
+}
+
+/**
+ * Waits for the ring to finish up to the latest request. Usefull for waiting
+ * for flip events, e.g for the overlay support. */
+int i915_lp_ring_sync(struct drm_device *dev)
+{
+ uint32_t seqno;
+ int ret;
+
+ seqno = i915_add_request(dev, NULL, 0);
+
+ if (seqno == 0)
+ return -ENOMEM;
+
+ ret = i915_do_wait_request(dev, seqno, 0);
+ BUG_ON(ret == -ERESTARTSYS);
+ return ret;
+}
+
static void
i915_gem_flush(struct drm_device *dev,
uint32_t invalidate_domains,
@@ -1856,7 +1887,7 @@ i915_gem_flush(struct drm_device *dev,
#endif
BEGIN_LP_RING(2);
OUT_RING(cmd);
- OUT_RING(0); /* noop */
+ OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
}
}
diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h
index 26641e9..3933691 100644
--- a/include/drm/drm_os_linux.h
+++ b/include/drm/drm_os_linux.h
@@ -123,5 +123,5 @@ do {
\
remove_wait_queue((queue), entry);\
} while (0)
-#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
+#define DRM_WAKEUP( queue ) wake_up( queue )
#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
--
1.6.3.3
--
Come build
[PATCH 5/8] [drm/i915] fully switch off overlay when not in use
Now that the cache flushing of the memory based overlay regs works, we can safely switch off the overlay. Beforehand it was only disabled (like in userspace). Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/intel_overlay.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 3f6f3a3..4e88abb 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -323,7 +323,6 @@ static int intel_overlay_off(struct intel_overlay *overlay) } /* turn overlay off */ - /* this is not done in userspace! BEGIN_LP_RING(6); OUT_RING(MI_FLUSH); OUT_RING(MI_NOOP); @@ -338,7 +337,7 @@ static int intel_overlay_off(struct intel_overlay *overlay) DRM_ERROR(intel overlay: ring sync failed, hw likely wedged\n); overlay-hw_wedged = 1; return ret; - }*/ + } overlay-active = 0; -- 1.6.3.3 -- Come build with us! The BlackBerryreg; Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9#45;12, 2009. Register now#33; http://p.sf.net/sfu/devconf -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [Intel-gfx] [PATCH 0/8] drmmode overlay support v3
On Fri, Oct 02, 2009 at 02:38:46PM -0700, Eric Anholt wrote: On Tue, 2009-09-15 at 22:57 +0200, Daniel Vetter wrote: OK, I've finally pulled this for -next, with a bit of hand resolving of conflicts. I debated, because of the somewhat unusual series of adding the ring sync, implementing, fixing the ring sync use, then removing ring sync. Often, that sort of stuff gets flattened out in the commit history. However, in this case I think it's OK as overlays are touchy and bisectability for is the interruptible stuff working correctly may prove useful. I've actually flattened all previous iterations. But when I was tackling the non-interruptible sleeps, suddenly all my testers went awol. So I'd like to merge a somewhat tested base version for easier debugging. Then I noticed that you'd told me that there was newer stuff in your gitorious tree. Only, that stuff claims to be older (v3), and doesn't have some of the patches above. So I've pushed my merge to drm-overlay of my tree for review -- is it what you think should land? I've actually rebased everything locally but then screwed up by pushing the wrong branch. Sorry for the mess and your duplicate effort. As mentioned on irc there's just a tiny fix missing. I'll follow up with a patch against drm-tree when I've finished stress-testing it on my box. Thanks, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Come build with us! The BlackBerryreg; Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9#45;12, 2009. Register now#33; http://p.sf.net/sfu/devconf -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH] drm/i915: overlay: kill one more unnecessary uninterruptible sleep
I've simply overlooked one case in the conversion to interruptible
sleeps. Rectify this.
Also delete a leftover debug printk.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_overlay.c | 17 +++--
1 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/gpu/drm/i915/intel_overlay.c
index 972d715..f1bf0b0 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -286,16 +286,15 @@ static int intel_overlay_wait_flip(struct intel_overlay
*overlay)
RING_LOCALS;
if (overlay-last_flip_req != 0) {
- ret = i915_do_wait_request(dev, overlay-last_flip_req, 0);
- if (ret != 0)
- return ret;
-
- overlay-last_flip_req = 0;
+ ret = i915_do_wait_request(dev, overlay-last_flip_req, 1);
+ if (ret == 0) {
+ overlay-last_flip_req = 0;
- tmp = I915_READ(ISR);
+ tmp = I915_READ(ISR);
- if (!(tmp I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT))
- return 0;
+ if (!(tmp I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT))
+ return 0;
+ }
}
/* synchronous slowpath */
@@ -439,8 +438,6 @@ int intel_overlay_recover_from_interrupt(struct
intel_overlay *overlay,
return ret;
case SWITCH_OFF_STAGE_2:
- printk(switch off 2\n);
-
BUG_ON(!overlay-vid_bo);
obj = overlay-vid_bo-obj;
--
1.6.4.3
--
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Re: [Intel-gfx] [PATCH] drm/i915: overlay: kill one more unnecessary uninterruptible sleep
On Thu, Oct 08, 2009 at 10:11:40AM -0700, Eric Anholt wrote: On Sun, 2009-10-04 at 15:00 +0200, Daniel Vetter wrote: I've simply overlooked one case in the conversion to interruptible sleeps. Rectify this. Also delete a leftover debug printk. OK, I'm confused about what this patch is about. I thought you were going to check if the patch series I applied was the right one or not, given that it was older than your comment please pull my tree instead of the patch series I sent out on IRC. [Sorry for the long delay, I was offline last week and then my mail server fried itselft. Hope I haven't missed anything else.] Trying to unconfuse: The patch series you merged is indeed older than the one I've talked about in irc. But I screwed up and pushed an even older version to gitorious. Instead of pushing my local stuff again, I've simply created this delta patch. If you apply this on top of what you have already merged in drm-intel/drm-overlay, you get exactly the version I've ment on irc. Yours, Daniel btw: I've just noticed that you merged my ddx stuff, thanks. Now that the ums overlay support is gone, there are still some ugly leftovers. I'm cooking patches atm. -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: 079 365 57 48 -- Come build with us! The BlackBerry(R) Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9 - 12, 2009. Register now! http://p.sf.net/sfu/devconference -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [BISECTED] drm: random hang since 620f378 drm: prune modes when ...
On Sun, Dec 13, 2009 at 12:30:25PM +, Arnd Bergmann wrote: And now it's obvious that my computer hates me. 12 hours of uptime, one reboot to check the old other version is broken, it crashes. I reboot into the good version, send out the above email and the next minute it crashes again. c05422d52ee6b is not the culprit. Sorry Daniel for blaming your patch. No problem. Looks like your hunting a pretty ugly Heisenbug. There's quite a interesting blog post by Paul McKenney, esp. the solution to Quick Quiz 1 might be usefull in your case: http://paulmck.livejournal.com/14639.html Happy Hunting, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Return on Information: Google Enterprise Search pays you back Get the facts. http://p.sf.net/sfu/google-dev2dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 1/2] drm: introduce drm_gem_object_[handle_]unreference_unlocked
On Tue, Feb 09, 2010 at 06:49:11AM +0100, Luca Barbieri wrote: This patch introduces the drm_gem_object_unreference_unlocked and drm_gem_object_handle_unreference_unlocked functions that do not require holding struct_mutex. drm_gem_object_unreference_unlocked calls the new -gem_free_object_unlocked entry point if available, and otherwise just takes struct_mutex and just calls -gem_free_object Why not add a BUG_ON(!mutex_is_locked(dev-struct_mutex)) to drm_gem_object_unreference to catch wrong api by occasional drm hackers like me? -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- The Planet: dedicated and managed hosting, cloud storage, colocation Stay online with enterprise data centers and the best network in the business Choose flexible plans and management services without long-term contracts Personal 24x7 support from experience hosting pros just a phone call away. http://p.sf.net/sfu/theplanet-com -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 2/2] Use drm_gem_object_[handle_]unreference_unlocked where possible
On Tue, Feb 09, 2010 at 06:49:12AM +0100, Luca Barbieri wrote: Mostly obvious simplifications. The i915 pread/pwrite ioctls, intel_overlay_put_image and nouveau_gem_new were incorrectly using the locked versions without locking: this is also fixed in this patch. Just one nitpick on the intel_overlay.c part .. diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 2639591..1b50d61 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -1179,7 +1179,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data, out_unlock: mutex_unlock(dev-struct_mutex); mutex_unlock(dev-mode_config.mutex); - drm_gem_object_unreference(new_bo); + drm_gem_object_unreference_unlocked(new_bo); kfree(params); Just move the drm_gem_object_unreference before the mutex_unlock calls, make more sense that way, IMHO. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- The Planet: dedicated and managed hosting, cloud storage, colocation Stay online with enterprise data centers and the best network in the business Choose flexible plans and management services without long-term contracts Personal 24x7 support from experience hosting pros just a phone call away. http://p.sf.net/sfu/theplanet-com -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [patch] i915: fix small leak on error path
Oh, dang. Thanks for catching this. Eric, please merge.
Cc: sta...@kernel.org (for .33)
Reviewed-by: Daniel Vetter dan...@ffwll.ch
On Sat, Mar 06, 2010 at 02:05:39PM +0300, Dan Carpenter wrote:
We should free params before returning.
Signed-off-by: Dan Carpenter erro...@gmail.com
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/gpu/drm/i915/intel_overlay.c
index d355d1d..60595fc 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1068,14 +1068,18 @@ int intel_overlay_put_image(struct drm_device *dev,
void *data,
drmmode_obj = drm_mode_object_find(dev, put_image_rec-crtc_id,
DRM_MODE_OBJECT_CRTC);
- if (!drmmode_obj)
- return -ENOENT;
+ if (!drmmode_obj) {
+ ret = -ENOENT;
+ goto out_free;
+ }
crtc = to_intel_crtc(obj_to_crtc(drmmode_obj));
new_bo = drm_gem_object_lookup(dev, file_priv,
put_image_rec-bo_handle);
- if (!new_bo)
- return -ENOENT;
+ if (!new_bo) {
+ ret = -ENOENT;
+ goto out_free;
+ }
mutex_lock(dev-mode_config.mutex);
mutex_lock(dev-struct_mutex);
@@ -1165,6 +1169,7 @@ out_unlock:
mutex_unlock(dev-struct_mutex);
mutex_unlock(dev-mode_config.mutex);
drm_gem_object_unreference_unlocked(new_bo);
+out_free:
kfree(params);
return ret;
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
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[PATCH 00/14] cleanup radeon_asic.h
Hi all, This patch pile moves the static struct radeon_asic asic definitions form radeon_asic.h into the asic-specific files, where I think they belong. This way radeon_asic.h becomes a real header file that can be #included. And indeed, with all the copypasting of function declarations, one has gotten out of sync. The next step would be to collect asic specific declarations in radeon_asic.h - atm they are somewhat scattered. But this can easily be done on the go and has way too much potential for conflicts with other patches. So I didn't do this. Tested on my rv570. Comments higly welcome. Yours, Daniel Daniel Vetter (14): drm/radoen: move r100 asic struct to r100.c drm/radoen: move r200 asic struct to r200.c drm/radeon: move r300 asic structs to r300.c drm/radeon: move r420 asic struct to r420.c drm/radoen: move rs400 asic struct to rs400.c drm/radoen: move rs600 asic struct to rs600.c drm/radoen: move rs690 asic struct to rs690.c drm/radoen: move rv515 asic struct to rv515.c drm/radoen: move r520 asic struct to r520.c drm/radoen: move r600 asic struct to r600.c drm/radoen: move rv770 asic struct to rv770.c drm/radoen: move evergreen asic struct to evergreen.c drm/radoen: unconfuse return value of radeon_asic-clear_surface_reg drm/radeon: include radeon_asic.h in asic.c drivers/gpu/drm/radeon/evergreen.c | 39 +++- drivers/gpu/drm/radeon/r100.c| 39 +++ drivers/gpu/drm/radeon/r200.c| 38 +++ drivers/gpu/drm/radeon/r300.c| 76 ++ drivers/gpu/drm/radeon/r420.c| 39 +++ drivers/gpu/drm/radeon/r520.c| 39 +++ drivers/gpu/drm/radeon/r600.c| 43 +++- drivers/gpu/drm/radeon/radeon.h |3 +- drivers/gpu/drm/radeon/radeon_asic.h | 494 ++ drivers/gpu/drm/radeon/rs400.c | 39 +++ drivers/gpu/drm/radeon/rs600.c | 43 +++- drivers/gpu/drm/radeon/rs690.c | 39 +++ drivers/gpu/drm/radeon/rv515.c | 41 +++- drivers/gpu/drm/radeon/rv770.c | 42 +++- 14 files changed, 518 insertions(+), 496 deletions(-) -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 10/14] drm/radoen: move r600 asic struct to r600.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r600.c| 43 ++
drivers/gpu/drm/radeon/radeon_asic.h | 37 +
2 files changed, 44 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c522901..c45bbcc 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2950,3 +2950,46 @@ void r600_ioctl_wait_idle(struct radeon_device *rdev,
struct radeon_bo *bo)
{
WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
}
+
+extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
+void rv515_bandwidth_update(struct radeon_device *rdev);
+int r600_cs_parse(struct radeon_cs_parser *p);
+u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
+int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+
+struct radeon_asic r600_asic = {
+ .init = r600_init,
+ .fini = r600_fini,
+ .suspend = r600_suspend,
+ .resume = r600_resume,
+ .cp_commit = r600_cp_commit,
+ .vga_set_state = r600_vga_set_state,
+ .gpu_reset = r600_gpu_reset,
+ .gart_tlb_flush = r600_pcie_gart_tlb_flush,
+ .gart_set_page = rs600_gart_set_page,
+ .ring_test = r600_ring_test,
+ .ring_ib_execute = r600_ring_ib_execute,
+ .irq_set = r600_irq_set,
+ .irq_process = r600_irq_process,
+ .get_vblank_counter = rs600_get_vblank_counter,
+ .fence_ring_emit = r600_fence_ring_emit,
+ .cs_parse = r600_cs_parse,
+ .copy_blit = r600_copy_blit,
+ .copy_dma = r600_copy_blit,
+ .copy = r600_copy_blit,
+ .get_engine_clock = radeon_atom_get_engine_clock,
+ .set_engine_clock = radeon_atom_set_engine_clock,
+ .get_memory_clock = radeon_atom_get_memory_clock,
+ .set_memory_clock = radeon_atom_set_memory_clock,
+ .get_pcie_lanes = rv370_get_pcie_lanes,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
+ .set_surface_reg = r600_set_surface_reg,
+ .clear_surface_reg = r600_clear_surface_reg,
+ .bandwidth_update = rv515_bandwidth_update,
+ .hpd_init = r600_hpd_init,
+ .hpd_fini = r600_hpd_fini,
+ .hpd_sense = r600_hpd_sense,
+ .hpd_set_polarity = r600_hpd_set_polarity,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 3137f2c..ba40f8a 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -231,42 +231,7 @@ void r600_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd);
extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo
*bo);
-static struct radeon_asic r600_asic = {
- .init = r600_init,
- .fini = r600_fini,
- .suspend = r600_suspend,
- .resume = r600_resume,
- .cp_commit = r600_cp_commit,
- .vga_set_state = r600_vga_set_state,
- .gpu_reset = r600_gpu_reset,
- .gart_tlb_flush = r600_pcie_gart_tlb_flush,
- .gart_set_page = rs600_gart_set_page,
- .ring_test = r600_ring_test,
- .ring_ib_execute = r600_ring_ib_execute,
- .irq_set = r600_irq_set,
- .irq_process = r600_irq_process,
- .get_vblank_counter = rs600_get_vblank_counter,
- .fence_ring_emit = r600_fence_ring_emit,
- .cs_parse = r600_cs_parse,
- .copy_blit = r600_copy_blit,
- .copy_dma = r600_copy_blit,
- .copy = r600_copy_blit,
- .get_engine_clock = radeon_atom_get_engine_clock,
- .set_engine_clock = radeon_atom_set_engine_clock,
- .get_memory_clock = radeon_atom_get_memory_clock,
- .set_memory_clock = radeon_atom_set_memory_clock,
- .get_pcie_lanes = rv370_get_pcie_lanes,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = rv515_bandwidth_update,
- .hpd_init = r600_hpd_init,
- .hpd_fini = r600_hpd_fini,
- .hpd_sense = r600_hpd_sense,
- .hpd_set_polarity = r600_hpd_set_polarity,
- .ioctl_wait_idle = r600_ioctl_wait_idle,
-};
+extern struct radeon_asic r600_asic;
/*
* rv770,rv730,rv710,rv740
--
1.7.0
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[PATCH 01/14] drm/radoen: move r100 asic struct to r100.c
This is the first step to clean up radeon_asic.h and make it into a real
header file (i.e. kill the static struct definitions). Then it can be
included by the asic.c files to compile-check the declarations of
shared functions (some differ atm).
This first patch just moves the r100_asic struct to r100.c
To accomplish this, the declarations for a few shared functions had to
be moved from radeon_asic.h to radeon.h. They'll move back when this
cleanup is complete.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r100.c| 38
drivers/gpu/drm/radeon/radeon.h | 13
drivers/gpu/drm/radeon/radeon_asic.h | 52 +-
3 files changed, 52 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 91eb762..facf3d8 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3538,3 +3538,41 @@ int r100_init(struct radeon_device *rdev)
}
return 0;
}
+
+struct radeon_asic r100_asic = {
+ .init = r100_init,
+ .fini = r100_fini,
+ .suspend = r100_suspend,
+ .resume = r100_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r100_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r100_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r100_fence_ring_emit,
+ .cs_parse = r100_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = NULL,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 829e26e..bf5a2e6 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -862,6 +862,19 @@ union radeon_asic_config {
struct rv770_asic rv770;
};
+/* WIP: Declarations from radeon_asic.h
+ * These will move back to radeon_asic.h as soon as it has morphed into
+ * a real header. */
+uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
+void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t
eng_clock);
+uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
+void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
+
+uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
+void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t
eng_clock);
+uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
+void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t
mem_clock);
+void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
/*
* IOCTL.
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index d3a157b..a2b4bd4 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -29,20 +29,6 @@
#define __RADEON_ASIC_H__
/*
- * common functions
- */
-uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
-void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t
eng_clock);
-uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
-void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
-
-uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
-void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t
eng_clock);
-uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
-void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t
mem_clock);
-void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
-
-/*
* r100,rv100,rs100,rv200,rs200
*/
extern int r100_init(struct radeon_device *rdev);
@@ -83,43 +69,7 @@ bool r100_hpd_sense(struct radeon_device *rdev, enum
radeon_hpd_id hpd);
void r100_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd);
-static struct radeon_asic r100_asic = {
- .init
[PATCH 07/14] drm/radoen: move rs690 asic struct to rs690.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon_asic.h | 38 +-
drivers/gpu/drm/radeon/rs690.c | 72 ++
2 files changed, 73 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 2de7e08..9ff56ff 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -163,44 +163,8 @@ int rs690_suspend(struct radeon_device *rdev);
uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
void rs690_bandwidth_update(struct radeon_device *rdev);
-static struct radeon_asic rs690_asic = {
- .init = rs690_init,
- .fini = rs690_fini,
- .suspend = rs690_suspend,
- .resume = rs690_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = r300_gpu_reset,
- .gart_tlb_flush = rs400_gart_tlb_flush,
- .gart_set_page = rs400_gart_set_page,
- .cp_commit = r100_cp_commit,
- .ring_start = r300_ring_start,
- .ring_test = r100_ring_test,
- .ring_ib_execute = r100_ring_ib_execute,
- .irq_set = rs600_irq_set,
- .irq_process = rs600_irq_process,
- .get_vblank_counter = rs600_get_vblank_counter,
- .fence_ring_emit = r300_fence_ring_emit,
- .cs_parse = r300_cs_parse,
- .copy_blit = r100_copy_blit,
- .copy_dma = r200_copy_dma,
- .copy = r200_copy_dma,
- .get_engine_clock = radeon_atom_get_engine_clock,
- .set_engine_clock = radeon_atom_set_engine_clock,
- .get_memory_clock = radeon_atom_get_memory_clock,
- .set_memory_clock = radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = radeon_atom_set_clock_gating,
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = rs690_bandwidth_update,
- .hpd_init = rs600_hpd_init,
- .hpd_fini = rs600_hpd_fini,
- .hpd_sense = rs600_hpd_sense,
- .hpd_set_polarity = rs600_hpd_set_polarity,
- .ioctl_wait_idle = NULL,
-};
+extern struct radeon_asic rs690_asic;
/*
* rv515
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 83b9174..5c84c0b 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -741,3 +741,75 @@ int rs690_init(struct radeon_device *rdev)
}
return 0;
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+extern int r300_gpu_reset(struct radeon_device *rdev);
+void r100_cp_commit(struct radeon_device *rdev);
+void r300_ring_start(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+int r100_ring_test(struct radeon_device *rdev);
+void rs400_gart_tlb_flush(struct radeon_device *rdev);
+int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
+void rs600_hpd_init(struct radeon_device *rdev);
+void rs600_hpd_fini(struct radeon_device *rdev);
+bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void rs600_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+int rs600_irq_set(struct radeon_device *rdev);
+int rs600_irq_process(struct radeon_device *rdev);
+
+struct radeon_asic rs690_asic = {
+ .init = rs690_init,
+ .fini = rs690_fini,
+ .suspend = rs690_suspend,
+ .resume = rs690_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = rs400_gart_tlb_flush,
+ .gart_set_page = rs400_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = rs600_irq_set,
+ .irq_process
[PATCH 13/14] drm/radoen: unconfuse return value of radeon_asic-clear_surface_reg
No one cares about it, so set it to void.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon.h |2 +-
drivers/gpu/drm/radeon/radeon_asic.h |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index bf5a2e6..9187fd7 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -782,7 +782,7 @@ struct radeon_asic {
int (*set_surface_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
- int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
+ void (*clear_surface_reg)(struct radeon_device *rdev, int reg);
void (*bandwidth_update)(struct radeon_device *rdev);
void (*hpd_init)(struct radeon_device *rdev);
void (*hpd_fini)(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 4db2e37..9a3bf44 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -59,7 +59,7 @@ int r100_copy_blit(struct radeon_device *rdev,
int r100_set_surface_reg(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
-int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_clear_surface_reg(struct radeon_device *rdev, int reg);
void r100_bandwidth_update(struct radeon_device *rdev);
void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
int r100_ring_test(struct radeon_device *rdev);
@@ -218,7 +218,7 @@ int r600_gpu_reset(struct radeon_device *rdev);
int r600_set_surface_reg(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
-int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
int r600_ring_test(struct radeon_device *rdev);
int r600_copy_blit(struct radeon_device *rdev,
--
1.7.0
--
Download Intel#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
--
___
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 14/14] drm/radeon: include radeon_asic.h in asic.c
And kill the temporary function declarations. Also drop a few
unnecessary forward declarations.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/evergreen.c | 12 +-
drivers/gpu/drm/radeon/r100.c|1 +
drivers/gpu/drm/radeon/r200.c| 35 +
drivers/gpu/drm/radeon/r300.c| 31 +-
drivers/gpu/drm/radeon/r420.c| 38 +---
drivers/gpu/drm/radeon/r520.c| 40 +-
drivers/gpu/drm/radeon/r600.c| 12 +
drivers/gpu/drm/radeon/radeon.h | 14
drivers/gpu/drm/radeon/radeon_asic.h | 14
drivers/gpu/drm/radeon/rs400.c | 35 +
drivers/gpu/drm/radeon/rs600.c | 30 +---
drivers/gpu/drm/radeon/rs690.c | 35 +
drivers/gpu/drm/radeon/rv515.c | 37 +--
drivers/gpu/drm/radeon/rv770.c | 33 +---
14 files changed, 28 insertions(+), 339 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 618006a..a016694 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -25,15 +25,13 @@
#include linux/platform_device.h
#include drmP.h
#include radeon.h
+#include radeon_asic.h
#include radeon_drm.h
#include rv770d.h
#include atom.h
#include avivod.h
#include evergreen_reg.h
-static void evergreen_gpu_init(struct radeon_device *rdev);
-void evergreen_fini(struct radeon_device *rdev);
-
bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
{
bool connected = false;
@@ -766,14 +764,6 @@ void evergreen_fini(struct radeon_device *rdev)
radeon_dummy_page_fini(rdev);
}
-void r600_vga_set_state(struct radeon_device *rdev, bool state);
-void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
-int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
-int r600_set_surface_reg(struct radeon_device *rdev, int reg,
-uint32_t tiling_flags, uint32_t pitch,
-uint32_t offset, uint32_t obj_size);
-int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
-
struct radeon_asic evergreen_asic = {
.init = evergreen_init,
.fini = evergreen_fini,
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index facf3d8..270fbdf 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -31,6 +31,7 @@
#include radeon_drm.h
#include radeon_reg.h
#include radeon.h
+#include radeon_asic.h
#include r100d.h
#include rs100d.h
#include rv200d.h
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index 7dfeab3..990142f 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -30,6 +30,7 @@
#include radeon_drm.h
#include radeon_reg.h
#include radeon.h
+#include radeon_asic.h
#include r100d.h
#include r200_reg_safe.h
@@ -508,40 +509,6 @@ void r200_set_safe_registers(struct radeon_device *rdev)
rdev-config.r100.reg_safe_bm_size = ARRAY_SIZE(r200_reg_safe_bm);
}
-extern int r100_init(struct radeon_device *rdev);
-extern void r100_fini(struct radeon_device *rdev);
-extern int r100_suspend(struct radeon_device *rdev);
-extern int r100_resume(struct radeon_device *rdev);
-void r100_vga_set_state(struct radeon_device *rdev, bool state);
-int r100_gpu_reset(struct radeon_device *rdev);
-void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
-int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
-void r100_cp_commit(struct radeon_device *rdev);
-void r100_ring_start(struct radeon_device *rdev);
-int r100_ring_test(struct radeon_device *rdev);
-void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
-int r100_irq_set(struct radeon_device *rdev);
-int r100_irq_process(struct radeon_device *rdev);
-u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
-void r100_fence_ring_emit(struct radeon_device *rdev,
- struct radeon_fence *fence);
-int r100_cs_parse(struct radeon_cs_parser *p);
-int r100_copy_blit(struct radeon_device *rdev,
- uint64_t src_offset,
- uint64_t dst_offset,
- unsigned num_pages,
- struct radeon_fence *fence);
-int r100_set_surface_reg(struct radeon_device *rdev, int reg,
-uint32_t tiling_flags, uint32_t pitch,
-uint32_t offset, uint32_t obj_size);
-int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
-void r100_bandwidth_update(struct radeon_device *rdev);
-void r100_hpd_init(struct radeon_device *rdev);
-void r100_hpd_fini(struct radeon_device *rdev);
-bool r100_hpd_sense(struct radeon_device *rdev, enum
[PATCH 09/14] drm/radoen: move r520 asic struct to r520.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r520.c| 77 ++
drivers/gpu/drm/radeon/radeon_asic.h | 40 +-
2 files changed, 79 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 2b8a5dd..554f667 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -309,3 +309,80 @@ int r520_init(struct radeon_device *rdev)
}
return 0;
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
+extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i,
uint64_t addr);
+void r100_cp_commit(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_ring_test(struct radeon_device *rdev);
+int rs600_irq_set(struct radeon_device *rdev);
+int rs600_irq_process(struct radeon_device *rdev);
+u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
+extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
+void rs600_hpd_init(struct radeon_device *rdev);
+void rs600_hpd_fini(struct radeon_device *rdev);
+bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void rs600_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+void rv515_fini(struct radeon_device *rdev);
+int rv515_suspend(struct radeon_device *rdev);
+int rv515_gpu_reset(struct radeon_device *rdev);
+void rv515_ring_start(struct radeon_device *rdev);
+void rv515_bandwidth_update(struct radeon_device *rdev);
+
+struct radeon_asic r520_asic = {
+ .init = r520_init,
+ .fini = rv515_fini,
+ .suspend = rv515_suspend,
+ .resume = r520_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = rv515_gpu_reset,
+ .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
+ .gart_set_page = rv370_pcie_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = rv515_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = rs600_irq_set,
+ .irq_process = rs600_irq_process,
+ .get_vblank_counter = rs600_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_atom_get_engine_clock,
+ .set_engine_clock = radeon_atom_set_engine_clock,
+ .get_memory_clock = radeon_atom_get_memory_clock,
+ .set_memory_clock = radeon_atom_set_memory_clock,
+ .get_pcie_lanes = rv370_get_pcie_lanes,
+ .set_pcie_lanes = rv370_set_pcie_lanes,
+ .set_clock_gating = radeon_atom_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = rv515_bandwidth_update,
+ .hpd_init = rs600_hpd_init,
+ .hpd_fini = rs600_hpd_fini,
+ .hpd_sense = rs600_hpd_sense,
+ .hpd_set_polarity = rs600_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 941ef08..3137f2c 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -115,7 +115,6 @@ extern int r420_resume(struct radeon_device *rdev);
extern struct radeon_asic r420_asic;
-
/*
* rs400,rs480
*/
@@ -188,43 +187,8 @@ extern struct radeon_asic rv515_asic;
*/
int r520_init(struct radeon_device *rdev);
int r520_resume(struct radeon_device *rdev);
-static struct radeon_asic r520_asic = {
- .init = r520_init,
- .fini = rv515_fini,
- .suspend = rv515_suspend,
- .resume = r520_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = rv515_gpu_reset
[PATCH 02/14] drm/radoen: move r200 asic struct to r200.c
Like for the r100.
Because radeon_asic.h is not yet usable as a header file, I had to
copy a few shared function declarations into r200.c. Yes, this is
ugly but not actually worse than current state. And it'll all be
gone when this header untangling is done.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r200.c| 71 ++
drivers/gpu/drm/radeon/radeon_asic.h | 37 +-
2 files changed, 72 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index 1146c99..7dfeab3 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -507,3 +507,74 @@ void r200_set_safe_registers(struct radeon_device *rdev)
rdev-config.r100.reg_safe_bm = r200_reg_safe_bm;
rdev-config.r100.reg_safe_bm_size = ARRAY_SIZE(r200_reg_safe_bm);
}
+
+extern int r100_init(struct radeon_device *rdev);
+extern void r100_fini(struct radeon_device *rdev);
+extern int r100_suspend(struct radeon_device *rdev);
+extern int r100_resume(struct radeon_device *rdev);
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+int r100_gpu_reset(struct radeon_device *rdev);
+void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
+int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+void r100_cp_commit(struct radeon_device *rdev);
+void r100_ring_start(struct radeon_device *rdev);
+int r100_ring_test(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_irq_set(struct radeon_device *rdev);
+int r100_irq_process(struct radeon_device *rdev);
+u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
+void r100_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+int r100_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_bandwidth_update(struct radeon_device *rdev);
+void r100_hpd_init(struct radeon_device *rdev);
+void r100_hpd_fini(struct radeon_device *rdev);
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+
+struct radeon_asic r200_asic = {
+ .init = r100_init,
+ .fini = r100_fini,
+ .suspend = r100_suspend,
+ .resume = r100_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r100_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r100_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r100_fence_ring_emit,
+ .cs_parse = r100_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index a2b4bd4..e2378ce 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -79,43 +79,8 @@ extern int r200_copy_dma(struct radeon_device *rdev,
uint64_t dst_offset,
unsigned num_pages,
struct radeon_fence *fence);
-static struct radeon_asic r200_asic = {
- .init = r100_init,
- .fini = r100_fini,
- .suspend = r100_suspend,
- .resume = r100_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = r100_gpu_reset,
- .gart_tlb_flush = r100_pci_gart_tlb_flush,
- .gart_set_page = r100_pci_gart_set_page,
- .cp_commit = r100_cp_commit
[PATCH 12/14] drm/radoen: move evergreen asic struct to evergreen.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/evergreen.c | 43 ++
drivers/gpu/drm/radeon/radeon_asic.h | 35 +--
2 files changed, 44 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index bd2e7aa..618006a 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -765,3 +765,46 @@ void evergreen_fini(struct radeon_device *rdev)
rdev-bios = NULL;
radeon_dummy_page_fini(rdev);
}
+
+void r600_vga_set_state(struct radeon_device *rdev, bool state);
+void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
+int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+int r600_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
+
+struct radeon_asic evergreen_asic = {
+ .init = evergreen_init,
+ .fini = evergreen_fini,
+ .suspend = evergreen_suspend,
+ .resume = evergreen_resume,
+ .cp_commit = NULL,
+ .gpu_reset = evergreen_gpu_reset,
+ .vga_set_state = r600_vga_set_state,
+ .gart_tlb_flush = r600_pcie_gart_tlb_flush,
+ .gart_set_page = rs600_gart_set_page,
+ .ring_test = NULL,
+ .ring_ib_execute = NULL,
+ .irq_set = NULL,
+ .irq_process = NULL,
+ .get_vblank_counter = NULL,
+ .fence_ring_emit = NULL,
+ .cs_parse = NULL,
+ .copy_blit = NULL,
+ .copy_dma = NULL,
+ .copy = NULL,
+ .get_engine_clock = radeon_atom_get_engine_clock,
+ .set_engine_clock = radeon_atom_set_engine_clock,
+ .get_memory_clock = radeon_atom_get_memory_clock,
+ .set_memory_clock = radeon_atom_set_memory_clock,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
+ .set_surface_reg = r600_set_surface_reg,
+ .clear_surface_reg = r600_clear_surface_reg,
+ .bandwidth_update = evergreen_bandwidth_update,
+ .hpd_init = evergreen_hpd_init,
+ .hpd_fini = evergreen_hpd_fini,
+ .hpd_sense = evergreen_hpd_sense,
+ .hpd_set_polarity = evergreen_hpd_set_polarity,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 57dceeb..4db2e37 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -259,39 +259,6 @@ bool evergreen_hpd_sense(struct radeon_device *rdev, enum
radeon_hpd_id hpd);
void evergreen_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd);
-static struct radeon_asic evergreen_asic = {
- .init = evergreen_init,
- .fini = evergreen_fini,
- .suspend = evergreen_suspend,
- .resume = evergreen_resume,
- .cp_commit = NULL,
- .gpu_reset = evergreen_gpu_reset,
- .vga_set_state = r600_vga_set_state,
- .gart_tlb_flush = r600_pcie_gart_tlb_flush,
- .gart_set_page = rs600_gart_set_page,
- .ring_test = NULL,
- .ring_ib_execute = NULL,
- .irq_set = NULL,
- .irq_process = NULL,
- .get_vblank_counter = NULL,
- .fence_ring_emit = NULL,
- .cs_parse = NULL,
- .copy_blit = NULL,
- .copy_dma = NULL,
- .copy = NULL,
- .get_engine_clock = radeon_atom_get_engine_clock,
- .set_engine_clock = radeon_atom_set_engine_clock,
- .get_memory_clock = radeon_atom_get_memory_clock,
- .set_memory_clock = radeon_atom_set_memory_clock,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = evergreen_bandwidth_update,
- .hpd_init = evergreen_hpd_init,
- .hpd_fini = evergreen_hpd_fini,
- .hpd_sense = evergreen_hpd_sense,
- .hpd_set_polarity = evergreen_hpd_set_polarity,
-};
+extern struct radeon_asic evergreen_asic;
#endif
--
1.7.0
--
Download Intel#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
--
___
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 04/14] drm/radeon: move r420 asic struct to r420.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r420.c| 75 ++
drivers/gpu/drm/radeon/radeon_asic.h | 39 +-
2 files changed, 77 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index c7593b8..2488edb 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -417,3 +417,78 @@ int r420_debugfs_pipes_info_init(struct radeon_device
*rdev)
return 0;
#endif
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+void r100_cp_commit(struct radeon_device *rdev);
+int r100_ring_test(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_irq_set(struct radeon_device *rdev);
+int r100_irq_process(struct radeon_device *rdev);
+u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_bandwidth_update(struct radeon_device *rdev);
+void r100_hpd_init(struct radeon_device *rdev);
+void r100_hpd_fini(struct radeon_device *rdev);
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern void r300_ring_start(struct radeon_device *rdev);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
+extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i,
uint64_t addr);
+extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
+extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
+extern int r300_gpu_reset(struct radeon_device *rdev);
+
+struct radeon_asic r420_asic = {
+ .init = r420_init,
+ .fini = r420_fini,
+ .suspend = r420_suspend,
+ .resume = r420_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
+ .gart_set_page = rv370_pcie_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_atom_get_engine_clock,
+ .set_engine_clock = radeon_atom_set_engine_clock,
+ .get_memory_clock = radeon_atom_get_memory_clock,
+ .set_memory_clock = radeon_atom_set_memory_clock,
+ .get_pcie_lanes = rv370_get_pcie_lanes,
+ .set_pcie_lanes = rv370_set_pcie_lanes,
+ .set_clock_gating = radeon_atom_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index f93f8f7..ff408ff 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -112,43 +112,8 @@ extern int r420_init(struct radeon_device *rdev);
extern void r420_fini(struct radeon_device *rdev);
extern int r420_suspend(struct radeon_device *rdev);
extern int r420_resume(struct radeon_device *rdev);
-static struct radeon_asic r420_asic = {
- .init = r420_init,
- .fini = r420_fini,
- .suspend = r420_suspend,
- .resume = r420_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = r300_gpu_reset,
- .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
- .gart_set_page = rv370_pcie_gart_set_page,
- .cp_commit = r100_cp_commit,
- .ring_start
[PATCH 08/14] drm/radoen: move rv515 asic struct to rv515.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon_asic.h | 38 +-
drivers/gpu/drm/radeon/rv515.c | 72 ++
2 files changed, 73 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 9ff56ff..941ef08 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -180,44 +180,8 @@ void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t
reg, uint32_t v);
void rv515_bandwidth_update(struct radeon_device *rdev);
int rv515_resume(struct radeon_device *rdev);
int rv515_suspend(struct radeon_device *rdev);
-static struct radeon_asic rv515_asic = {
- .init = rv515_init,
- .fini = rv515_fini,
- .suspend = rv515_suspend,
- .resume = rv515_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = rv515_gpu_reset,
- .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
- .gart_set_page = rv370_pcie_gart_set_page,
- .cp_commit = r100_cp_commit,
- .ring_start = rv515_ring_start,
- .ring_test = r100_ring_test,
- .ring_ib_execute = r100_ring_ib_execute,
- .irq_set = rs600_irq_set,
- .irq_process = rs600_irq_process,
- .get_vblank_counter = rs600_get_vblank_counter,
- .fence_ring_emit = r300_fence_ring_emit,
- .cs_parse = r300_cs_parse,
- .copy_blit = r100_copy_blit,
- .copy_dma = r200_copy_dma,
- .copy = r100_copy_blit,
- .get_engine_clock = radeon_atom_get_engine_clock,
- .set_engine_clock = radeon_atom_set_engine_clock,
- .get_memory_clock = radeon_atom_get_memory_clock,
- .set_memory_clock = radeon_atom_set_memory_clock,
- .get_pcie_lanes = rv370_get_pcie_lanes,
- .set_pcie_lanes = rv370_set_pcie_lanes,
- .set_clock_gating = radeon_atom_set_clock_gating,
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = rv515_bandwidth_update,
- .hpd_init = rs600_hpd_init,
- .hpd_fini = rs600_hpd_fini,
- .hpd_sense = rs600_hpd_sense,
- .hpd_set_polarity = rs600_hpd_set_polarity,
- .ioctl_wait_idle = NULL,
-};
+extern struct radeon_asic rv515_asic;
/*
* r520,rv530,rv560,rv570,r580
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index bea747d..a27494f 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -1182,3 +1182,75 @@ void rv515_bandwidth_update(struct radeon_device *rdev)
}
rv515_bandwidth_avivo_update(rdev);
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
+extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i,
uint64_t addr);
+void r100_cp_commit(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_ring_test(struct radeon_device *rdev);
+int rs600_irq_set(struct radeon_device *rdev);
+int rs600_irq_process(struct radeon_device *rdev);
+u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
+extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
+void rs600_hpd_init(struct radeon_device *rdev);
+void rs600_hpd_fini(struct radeon_device *rdev);
+bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void rs600_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+
+struct radeon_asic rv515_asic = {
+ .init = rv515_init,
+ .fini = rv515_fini,
+ .suspend = rv515_suspend,
+ .resume = rv515_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = rv515_gpu_reset,
+ .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
+ .gart_set_page = rv370_pcie_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = rv515_ring_start
[PATCH 05/14] drm/radoen: move rs400 asic struct to rs400.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon_asic.h | 38 +-
drivers/gpu/drm/radeon/rs400.c | 72 ++
2 files changed, 73 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index ff408ff..5671417 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -127,44 +127,8 @@ void rs400_gart_tlb_flush(struct radeon_device *rdev);
int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg);
void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
-static struct radeon_asic rs400_asic = {
- .init = rs400_init,
- .fini = rs400_fini,
- .suspend = rs400_suspend,
- .resume = rs400_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = r300_gpu_reset,
- .gart_tlb_flush = rs400_gart_tlb_flush,
- .gart_set_page = rs400_gart_set_page,
- .cp_commit = r100_cp_commit,
- .ring_start = r300_ring_start,
- .ring_test = r100_ring_test,
- .ring_ib_execute = r100_ring_ib_execute,
- .irq_set = r100_irq_set,
- .irq_process = r100_irq_process,
- .get_vblank_counter = r100_get_vblank_counter,
- .fence_ring_emit = r300_fence_ring_emit,
- .cs_parse = r300_cs_parse,
- .copy_blit = r100_copy_blit,
- .copy_dma = r200_copy_dma,
- .copy = r100_copy_blit,
- .get_engine_clock = radeon_legacy_get_engine_clock,
- .set_engine_clock = radeon_legacy_set_engine_clock,
- .get_memory_clock = radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = radeon_legacy_set_clock_gating,
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = r100_bandwidth_update,
- .hpd_init = r100_hpd_init,
- .hpd_fini = r100_hpd_fini,
- .hpd_sense = r100_hpd_sense,
- .hpd_set_polarity = r100_hpd_set_polarity,
- .ioctl_wait_idle = NULL,
-};
+extern struct radeon_asic rs400_asic;
/*
* rs600.
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 626d518..4d5427a 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -536,3 +536,75 @@ int rs400_init(struct radeon_device *rdev)
}
return 0;
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+extern int r300_gpu_reset(struct radeon_device *rdev);
+void r100_cp_commit(struct radeon_device *rdev);
+void r300_ring_start(struct radeon_device *rdev);
+int r100_irq_set(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_irq_set(struct radeon_device *rdev);
+int r100_irq_process(struct radeon_device *rdev);
+u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_bandwidth_update(struct radeon_device *rdev);
+void r100_hpd_init(struct radeon_device *rdev);
+void r100_hpd_fini(struct radeon_device *rdev);
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+int r100_ring_test(struct radeon_device *rdev);
+
+struct radeon_asic rs400_asic = {
+ .init = rs400_init,
+ .fini = rs400_fini,
+ .suspend = rs400_suspend,
+ .resume = rs400_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = rs400_gart_tlb_flush,
+ .gart_set_page = rs400_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter
[PATCH 03/14] drm/radeon: move r300 asic structs to r300.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/r300.c| 105 ++
drivers/gpu/drm/radeon/radeon_asic.h | 76 +
2 files changed, 107 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 4cef90c..2592ba6 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1440,3 +1440,108 @@ int r300_init(struct radeon_device *rdev)
}
return 0;
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
+int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+void r100_cp_commit(struct radeon_device *rdev);
+int r100_ring_test(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_irq_set(struct radeon_device *rdev);
+int r100_irq_process(struct radeon_device *rdev);
+u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_bandwidth_update(struct radeon_device *rdev);
+void r100_hpd_init(struct radeon_device *rdev);
+void r100_hpd_fini(struct radeon_device *rdev);
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+ enum radeon_hpd_id hpd);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+
+struct radeon_asic r300_asic = {
+ .init = r300_init,
+ .fini = r300_fini,
+ .suspend = r300_suspend,
+ .resume = r300_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = rv370_get_pcie_lanes,
+ .set_pcie_lanes = rv370_set_pcie_lanes,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
+
+struct radeon_asic r300_asic_pcie = {
+ .init = r300_init,
+ .fini = r300_fini,
+ .suspend = r300_suspend,
+ .resume = r300_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = rv370_pcie_gart_tlb_flush,
+ .gart_set_page = rv370_pcie_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .set_pcie_lanes = rv370_set_pcie_lanes,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init
[PATCH 06/14] drm/radoen: move rs600 asic struct to rs600.c
Like for r200.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon_asic.h | 39 +
drivers/gpu/drm/radeon/rs600.c | 63 ++
2 files changed, 64 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 5671417..2de7e08 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -151,44 +151,7 @@ bool rs600_hpd_sense(struct radeon_device *rdev, enum
radeon_hpd_id hpd);
void rs600_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd);
-static struct radeon_asic rs600_asic = {
- .init = rs600_init,
- .fini = rs600_fini,
- .suspend = rs600_suspend,
- .resume = rs600_resume,
- .vga_set_state = r100_vga_set_state,
- .gpu_reset = r300_gpu_reset,
- .gart_tlb_flush = rs600_gart_tlb_flush,
- .gart_set_page = rs600_gart_set_page,
- .cp_commit = r100_cp_commit,
- .ring_start = r300_ring_start,
- .ring_test = r100_ring_test,
- .ring_ib_execute = r100_ring_ib_execute,
- .irq_set = rs600_irq_set,
- .irq_process = rs600_irq_process,
- .get_vblank_counter = rs600_get_vblank_counter,
- .fence_ring_emit = r300_fence_ring_emit,
- .cs_parse = r300_cs_parse,
- .copy_blit = r100_copy_blit,
- .copy_dma = r200_copy_dma,
- .copy = r100_copy_blit,
- .get_engine_clock = radeon_atom_get_engine_clock,
- .set_engine_clock = radeon_atom_set_engine_clock,
- .get_memory_clock = radeon_atom_get_memory_clock,
- .set_memory_clock = radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = radeon_atom_set_clock_gating,
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = rs600_bandwidth_update,
- .hpd_init = rs600_hpd_init,
- .hpd_fini = rs600_hpd_fini,
- .hpd_sense = rs600_hpd_sense,
- .hpd_set_polarity = rs600_hpd_set_polarity,
- .ioctl_wait_idle = NULL,
-};
-
+extern struct radeon_asic rs600_asic;
/*
* rs690,rs740
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 47f046b..d3f75fd 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -681,3 +681,66 @@ int rs600_init(struct radeon_device *rdev)
}
return 0;
}
+
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
+extern int r300_gpu_reset(struct radeon_device *rdev);
+void r100_cp_commit(struct radeon_device *rdev);
+void r300_ring_start(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
+extern void r300_fence_ring_emit(struct radeon_device *rdev,
+ struct radeon_fence *fence);
+extern int r300_cs_parse(struct radeon_cs_parser *p);
+int r100_copy_blit(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+extern int r200_copy_dma(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_pages,
+ struct radeon_fence *fence);
+int r100_set_surface_reg(struct radeon_device *rdev, int reg,
+uint32_t tiling_flags, uint32_t pitch,
+uint32_t offset, uint32_t obj_size);
+int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+int r100_ring_test(struct radeon_device *rdev);
+
+struct radeon_asic rs600_asic = {
+ .init = rs600_init,
+ .fini = rs600_fini,
+ .suspend = rs600_suspend,
+ .resume = rs600_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = rs600_gart_tlb_flush,
+ .gart_set_page = rs600_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = rs600_irq_set,
+ .irq_process = rs600_irq_process,
+ .get_vblank_counter = rs600_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_atom_get_engine_clock,
+ .set_engine_clock = radeon_atom_set_engine_clock,
+ .get_memory_clock = radeon_atom_get_memory_clock,
+ .set_memory_clock = radeon_atom_set_memory_clock,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL
Re: [PATCH 00/14] cleanup radeon_asic.h
On Thu, Mar 11, 2010 at 10:54:09AM -0500, Alex Deucher wrote: I like keeping all the asic definitions in one file as you tend to need to update them all at one time and having them spread across all the asic files increases the likelihood of one or more of them getting missed. But I can live with it if other folks think it's a good idea. Alex I've also thought about putting all asic structs into one file but decided against it for two reasons: - putting the asics into the asic specific files allows us to mark asic-private functions as static. This makes code-reading easier. Of course, as someone who has just started to look at the radeon drm, I'm biased ;) - there was no .c file around where they'd fit. Creating a new radeon_asic.c file would be another option of course. If you think that's much better, I could respin the series. Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 00/14] cleanup radeon_asic.h
On Thu, Mar 11, 2010 at 04:46:01PM +0100, Jerome Glisse wrote: On Thu, Mar 11, 2010 at 02:06:02PM +0100, Daniel Vetter wrote: Hi all, This patch pile moves the static struct radeon_asic asic definitions form radeon_asic.h into the asic-specific files, where I think they belong. This way radeon_asic.h becomes a real header file that can be #included. And indeed, with all the copypasting of function declarations, one has gotten out of sync. The next step would be to collect asic specific declarations in radeon_asic.h - atm they are somewhat scattered. But this can easily be done on the go and has way too much potential for conflicts with other patches. So I didn't do this. Tested on my rv570. Comments higly welcome. Yours, Daniel It all looks good from a quick read through of the patches. For gathering asic function prototype i kind of started adding them to radeon.h at the bottom (there is already a bunch of them). Thus i think radeon_asic.h can be kill and extern declaration directly put into radeon_asic.c Yes, I've noticed that radeon.h has started to accumulate some declarations (because radeon_asic.h could not be included, I think). IMHO radeon.h is already growing out of bounds, so my plan was to move these declarations to radeon_asic.h. Most of the functions are only used by the asic specific support code (eg. r600 the blit stuff) so would only pollute the general namespace in radeon.h Does that sound reasonable? btw, radeon_asic.c doesn't exist here in my tree. Cheers, Jerome Cheers, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 00/14] cleanup radeon_asic.h
On Thu, Mar 11, 2010 at 05:34:28PM +0100, Jerome Glisse wrote: On Thu, Mar 11, 2010 at 05:24:22PM +0100, Rafał Miłecki wrote: 2010/3/11 Alex Deucher alexdeuc...@gmail.com: I like keeping all the asic definitions in one file as you tend to need to update them all at one time and having them spread across all the asic files increases the likelihood of one or more of them getting missed. But I can live with it if other folks think it's a good idea. Same here. One file means easier editing. Maybe we could use some other of proposed tricks? -- Rafał I don't have strong feeling but Alex has a point, right now we often update them, maybe we should add radeon_asic.c and move asic init (function now in radeon_device.c) along structure there. Ok, convinced. I'll respin the patch series along your idea (creating radeon_asic.c) and resend. Yours, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 00/14] cleanup radeon_asic.h
On Fri, Mar 12, 2010 at 06:52:43AM +1000, Dave Airlie wrote: I don't have strong feeling but Alex has a point, right now we often update them, maybe we should add radeon_asic.c and move asic init (function now in radeon_device.c) along structure there. I've seen it sugggested earlier, Just don't use declarations in the C file, that isn't acceptable coding. If we add radeon_asic.h make sure to include that in places that define the functions as well. Last thing we want is declarations to diverge by accident. Well, this is exactly what I'm trying to fix here. atm radeon_asic.h contains static struct definitions (i.e. should be a C file) and is therefore included only exactly _once_. And contains tons of declarations for the functions it uses. Which are actually in one case not coherent with the actual definitions! -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 4/5] drm/radeon: include radeon_asic.h in the asic specific files
In essence this creates a home for all asic specific declarations in radeon_asic.h Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/radeon/evergreen.c |1 + drivers/gpu/drm/radeon/r100.c |1 + drivers/gpu/drm/radeon/r200.c |1 + drivers/gpu/drm/radeon/r300.c |1 + drivers/gpu/drm/radeon/r420.c |1 + drivers/gpu/drm/radeon/r520.c |1 + drivers/gpu/drm/radeon/r600.c |1 + drivers/gpu/drm/radeon/rs400.c |1 + drivers/gpu/drm/radeon/rs600.c |1 + drivers/gpu/drm/radeon/rs690.c |1 + drivers/gpu/drm/radeon/rv515.c |1 + drivers/gpu/drm/radeon/rv770.c |1 + 12 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index bd2e7aa..9d6283e 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -25,6 +25,7 @@ #include linux/platform_device.h #include drmP.h #include radeon.h +#include radeon_asic.h #include radeon_drm.h #include rv770d.h #include atom.h diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 91eb762..d1243c2 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -31,6 +31,7 @@ #include radeon_drm.h #include radeon_reg.h #include radeon.h +#include radeon_asic.h #include r100d.h #include rs100d.h #include rv200d.h diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index 1146c99..85617c3 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c @@ -30,6 +30,7 @@ #include radeon_drm.h #include radeon_reg.h #include radeon.h +#include radeon_asic.h #include r100d.h #include r200_reg_safe.h diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 4cef90c..1042cea 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -30,6 +30,7 @@ #include drm.h #include radeon_reg.h #include radeon.h +#include radeon_asic.h #include radeon_drm.h #include r100_track.h #include r300d.h diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index c7593b8..2ab35ff 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -29,6 +29,7 @@ #include drmP.h #include radeon_reg.h #include radeon.h +#include radeon_asic.h #include atom.h #include r100d.h #include r420d.h diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index 2b8a5dd..f6d8541 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -27,6 +27,7 @@ */ #include drmP.h #include radeon.h +#include radeon_asic.h #include atom.h #include r520d.h diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index c522901..a3a5a20 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -31,6 +31,7 @@ #include drmP.h #include radeon_drm.h #include radeon.h +#include radeon_asic.h #include radeon_mode.h #include r600d.h #include atom.h diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 626d518..1240e7d 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -28,6 +28,7 @@ #include linux/seq_file.h #include drm/drmP.h #include radeon.h +#include radeon_asic.h #include rs400d.h /* This files gather functions specifics to : rs400,rs480 */ diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 47f046b..7c6de4b 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -37,6 +37,7 @@ */ #include drmP.h #include radeon.h +#include radeon_asic.h #include atom.h #include rs600d.h diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 83b9174..c39cb50 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c @@ -27,6 +27,7 @@ */ #include drmP.h #include radeon.h +#include radeon_asic.h #include atom.h #include rs690d.h diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index bea747d..26108b4 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -29,6 +29,7 @@ #include drmP.h #include rv515d.h #include radeon.h +#include radeon_asic.h #include atom.h #include rv515_reg_safe.h diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 37887de..7dc9ad0 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -29,6 +29,7 @@ #include linux/platform_device.h #include drmP.h #include radeon.h +#include radeon_asic.h #include radeon_drm.h #include rv770d.h #include atom.h -- 1.7.0 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance
[PATCH 3/5] drm/radeon: unconfuse return value of radeon_asic-clear_surface_reg
No one cares about it, so set it to void.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon.h |2 +-
drivers/gpu/drm/radeon/radeon_asic.h |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 63cc609..c51ae43 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -782,7 +782,7 @@ struct radeon_asic {
int (*set_surface_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
- int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
+ void (*clear_surface_reg)(struct radeon_device *rdev, int reg);
void (*bandwidth_update)(struct radeon_device *rdev);
void (*hpd_init)(struct radeon_device *rdev);
void (*hpd_fini)(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 2bc2623..4c0d3da 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -73,7 +73,7 @@ int r100_copy_blit(struct radeon_device *rdev,
int r100_set_surface_reg(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
-int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r100_clear_surface_reg(struct radeon_device *rdev, int reg);
void r100_bandwidth_update(struct radeon_device *rdev);
void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
int r100_ring_test(struct radeon_device *rdev);
@@ -212,7 +212,7 @@ int r600_gpu_reset(struct radeon_device *rdev);
int r600_set_surface_reg(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
-int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
int r600_ring_test(struct radeon_device *rdev);
int r600_copy_blit(struct radeon_device *rdev,
--
1.7.0
--
Download Intel#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
--
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[PATCH 0/5] clean up radeon_asic.h v2
Hi all, All new patch pile to make radeon_asic.h into a real header file. Now all the asic structs are gathered in the new radeon_asic.c file. Tested on my rv570. I've also added a new patch that gathers all r100 specific declarations into radeon_asic.h (at least where it makes sense). This is just an example to convince Jerome that radeon_asic.h might not be totally useless ;) Again, comments higly welcome. Yours, Daniel Daniel Vetter (5): drm/radeon: create radeon_asic.c drm/radeon: move asic structs to radeon_asic.c drm/radeon: unconfuse return value of radeon_asic-clear_surface_reg drm/radeon: include radeon_asic.h in the asic specific files drm/radeon: collect r100 asic related declarations in radeon_asic.h drivers/gpu/drm/radeon/Makefile|2 +- drivers/gpu/drm/radeon/evergreen.c |1 + drivers/gpu/drm/radeon/r100.c |1 + drivers/gpu/drm/radeon/r200.c |1 + drivers/gpu/drm/radeon/r300.c |1 + drivers/gpu/drm/radeon/r420.c |1 + drivers/gpu/drm/radeon/r520.c |1 + drivers/gpu/drm/radeon/r600.c |1 + drivers/gpu/drm/radeon/radeon.h| 55 +--- drivers/gpu/drm/radeon/radeon_asic.c | 723 drivers/gpu/drm/radeon/radeon_asic.h | 545 +++-- drivers/gpu/drm/radeon/radeon_device.c | 199 - drivers/gpu/drm/radeon/rs400.c |1 + drivers/gpu/drm/radeon/rs600.c |1 + drivers/gpu/drm/radeon/rs690.c |1 + drivers/gpu/drm/radeon/rv515.c |1 + drivers/gpu/drm/radeon/rv770.c |1 + 17 files changed, 793 insertions(+), 743 deletions(-) create mode 100644 drivers/gpu/drm/radeon/radeon_asic.c -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 1/5] drm/radeon: create radeon_asic.c
And move asic init plus a few related functions from radeon_device.c
to it. This file will hold all the asic structures in the future,
but atm they're still stuck in radeon_asic.h.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/Makefile|2 +-
drivers/gpu/drm/radeon/radeon.h|6 +
drivers/gpu/drm/radeon/radeon_asic.c | 236
drivers/gpu/drm/radeon/radeon_device.c | 199 ---
4 files changed, 243 insertions(+), 200 deletions(-)
create mode 100644 drivers/gpu/drm/radeon/radeon_asic.c
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index ed38262..3c91312 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -50,7 +50,7 @@ $(obj)/r600_cs.o: $(obj)/r600_reg_safe.h
radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
radeon_irq.o r300_cmdbuf.o r600_cp.o
# add KMS driver
-radeon-y += radeon_device.o radeon_kms.o \
+radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 829e26e..63cc609 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -862,6 +862,12 @@ union radeon_asic_config {
struct rv770_asic rv770;
};
+/*
+ * asic initizalization from radeon_asic.c
+ */
+void radeon_agp_disable(struct radeon_device *rdev);
+int radeon_asic_init(struct radeon_device *rdev);
+
/*
* IOCTL.
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c
b/drivers/gpu/drm/radeon/radeon_asic.c
new file mode 100644
index 000..9dffaed
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -0,0 +1,236 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ * Alex Deucher
+ * Jerome Glisse
+ */
+
+#include linux/console.h
+#include drm/drmP.h
+#include drm/drm_crtc_helper.h
+#include drm/radeon_drm.h
+#include linux/vgaarb.h
+#include linux/vga_switcheroo.h
+#include radeon_reg.h
+#include radeon.h
+#include radeon_asic.h
+#include atom.h
+
+/*
+ * Registers accessors functions.
+ */
+static uint32_t radeon_invalid_rreg(struct radeon_device *rdev, uint32_t reg)
+{
+ DRM_ERROR(Invalid callback to read register 0x%04X\n, reg);
+ BUG_ON(1);
+ return 0;
+}
+
+static void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg,
uint32_t v)
+{
+ DRM_ERROR(Invalid callback to write register 0x%04X with 0x%08X\n,
+ reg, v);
+ BUG_ON(1);
+}
+
+static void radeon_register_accessor_init(struct radeon_device *rdev)
+{
+ rdev-mc_rreg = radeon_invalid_rreg;
+ rdev-mc_wreg = radeon_invalid_wreg;
+ rdev-pll_rreg = radeon_invalid_rreg;
+ rdev-pll_wreg = radeon_invalid_wreg;
+ rdev-pciep_rreg = radeon_invalid_rreg;
+ rdev-pciep_wreg = radeon_invalid_wreg;
+
+ /* Don't change order as we are overridding accessor. */
+ if (rdev-family CHIP_RV515) {
+ rdev-pcie_reg_mask = 0xff;
+ } else {
+ rdev-pcie_reg_mask = 0x7ff;
+ }
+ /* FIXME: not sure here */
+ if (rdev-family = CHIP_R580) {
+ rdev-pll_rreg = r100_pll_rreg;
+ rdev-pll_wreg = r100_pll_wreg;
+ }
+ if (rdev-family = CHIP_R420) {
+ rdev-mc_rreg = r420_mc_rreg;
+ rdev-mc_wreg = r420_mc_wreg;
+ }
+ if (rdev-family = CHIP_RV515) {
+ rdev-mc_rreg = rv515_mc_rreg;
+ rdev-mc_wreg = rv515_mc_wreg
[PATCH 5/5] drm/radeon: collect r100 asic related declarations in radeon_asic.h
This just an example to show what radeon_asic.h might be good for.
Before Jerome kills it ;)
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon.h | 47 --
drivers/gpu/drm/radeon/radeon_asic.h | 52 +++--
2 files changed, 48 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index c51ae43..f5d0823 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -729,8 +729,6 @@ int radeon_debugfs_add_files(struct radeon_device *rdev,
struct drm_info_list *files,
unsigned nfiles);
int radeon_debugfs_fence_init(struct radeon_device *rdev);
-int r100_debugfs_rbbm_init(struct radeon_device *rdev);
-int r100_debugfs_cp_init(struct radeon_device *rdev);
/*
@@ -1194,51 +1192,6 @@ extern int radeon_resume_kms(struct drm_device *dev);
extern int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
-struct r100_mc_save {
- u32 GENMO_WT;
- u32 CRTC_EXT_CNTL;
- u32 CRTC_GEN_CNTL;
- u32 CRTC2_GEN_CNTL;
- u32 CUR_OFFSET;
- u32 CUR2_OFFSET;
-};
-extern void r100_cp_disable(struct radeon_device *rdev);
-extern int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
-extern void r100_cp_fini(struct radeon_device *rdev);
-extern void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
-extern int r100_pci_gart_init(struct radeon_device *rdev);
-extern void r100_pci_gart_fini(struct radeon_device *rdev);
-extern int r100_pci_gart_enable(struct radeon_device *rdev);
-extern void r100_pci_gart_disable(struct radeon_device *rdev);
-extern int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t
addr);
-extern int r100_debugfs_mc_info_init(struct radeon_device *rdev);
-extern int r100_gui_wait_for_idle(struct radeon_device *rdev);
-extern void r100_ib_fini(struct radeon_device *rdev);
-extern int r100_ib_init(struct radeon_device *rdev);
-extern void r100_irq_disable(struct radeon_device *rdev);
-extern int r100_irq_set(struct radeon_device *rdev);
-extern void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save
*save);
-extern void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save
*save);
-extern void r100_vram_init_sizes(struct radeon_device *rdev);
-extern void r100_wb_disable(struct radeon_device *rdev);
-extern void r100_wb_fini(struct radeon_device *rdev);
-extern int r100_wb_init(struct radeon_device *rdev);
-extern void r100_hdp_reset(struct radeon_device *rdev);
-extern int r100_rb2d_reset(struct radeon_device *rdev);
-extern int r100_cp_reset(struct radeon_device *rdev);
-extern void r100_vga_render_disable(struct radeon_device *rdev);
-extern int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
- struct radeon_cs_packet *pkt,
- struct radeon_bo *robj);
-extern int r100_cs_parse_packet0(struct radeon_cs_parser *p,
- struct radeon_cs_packet *pkt,
- const unsigned *auth, unsigned n,
- radeon_packet0_check_t check);
-extern int r100_cs_packet_parse(struct radeon_cs_parser *p,
- struct radeon_cs_packet *pkt,
- unsigned idx);
-extern void r100_enable_bm(struct radeon_device *rdev);
-extern void r100_set_common_regs(struct radeon_device *rdev);
/* rv200,rv250,rv280 */
extern void r200_set_safe_registers(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 4c0d3da..a0b8280 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -45,10 +45,18 @@ void radeon_atom_set_clock_gating(struct radeon_device
*rdev, int enable);
/*
* r100,rv100,rs100,rv200,rs200
*/
-extern int r100_init(struct radeon_device *rdev);
-extern void r100_fini(struct radeon_device *rdev);
-extern int r100_suspend(struct radeon_device *rdev);
-extern int r100_resume(struct radeon_device *rdev);
+struct r100_mc_save {
+ u32 GENMO_WT;
+ u32 CRTC_EXT_CNTL;
+ u32 CRTC_GEN_CNTL;
+ u32 CRTC2_GEN_CNTL;
+ u32 CUR_OFFSET;
+ u32 CUR2_OFFSET;
+};
+int r100_init(struct radeon_device *rdev);
+void r100_fini(struct radeon_device *rdev);
+int r100_suspend(struct radeon_device *rdev);
+int r100_resume(struct radeon_device *rdev);
uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
void r100_vga_set_state(struct radeon_device *rdev, bool state);
@@ -82,6 +90,42 @@ void r100_hpd_fini(struct radeon_device *rdev);
bool r100_hpd_sense
[PATCH 2/5] drm/radeon: move asic structs to radeon_asic.c
With these static structs gone, radeon_asic.h is a real header file
and can be used as such.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/radeon/radeon_asic.c | 487 +
drivers/gpu/drm/radeon/radeon_asic.h | 489 --
2 files changed, 487 insertions(+), 489 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c
b/drivers/gpu/drm/radeon/radeon_asic.c
index 9dffaed..6d2a545 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -128,6 +128,493 @@ void radeon_agp_disable(struct radeon_device *rdev)
/*
* ASIC
*/
+static struct radeon_asic r100_asic = {
+ .init = r100_init,
+ .fini = r100_fini,
+ .suspend = r100_suspend,
+ .resume = r100_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r100_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r100_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r100_fence_ring_emit,
+ .cs_parse = r100_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = NULL,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
+
+static struct radeon_asic r200_asic = {
+ .init = r100_init,
+ .fini = r100_fini,
+ .suspend = r100_suspend,
+ .resume = r100_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r100_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r100_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r100_fence_ring_emit,
+ .cs_parse = r100_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init = r100_hpd_init,
+ .hpd_fini = r100_hpd_fini,
+ .hpd_sense = r100_hpd_sense,
+ .hpd_set_polarity = r100_hpd_set_polarity,
+ .ioctl_wait_idle = NULL,
+};
+
+static struct radeon_asic r300_asic = {
+ .init = r300_init,
+ .fini = r300_fini,
+ .suspend = r300_suspend,
+ .resume = r300_resume,
+ .vga_set_state = r100_vga_set_state,
+ .gpu_reset = r300_gpu_reset,
+ .gart_tlb_flush = r100_pci_gart_tlb_flush,
+ .gart_set_page = r100_pci_gart_set_page,
+ .cp_commit = r100_cp_commit,
+ .ring_start = r300_ring_start,
+ .ring_test = r100_ring_test,
+ .ring_ib_execute = r100_ring_ib_execute,
+ .irq_set = r100_irq_set,
+ .irq_process = r100_irq_process,
+ .get_vblank_counter = r100_get_vblank_counter,
+ .fence_ring_emit = r300_fence_ring_emit,
+ .cs_parse = r300_cs_parse,
+ .copy_blit = r100_copy_blit,
+ .copy_dma = r200_copy_dma,
+ .copy = r100_copy_blit,
+ .get_engine_clock = radeon_legacy_get_engine_clock,
+ .set_engine_clock = radeon_legacy_set_engine_clock,
+ .get_memory_clock = radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = rv370_get_pcie_lanes,
+ .set_pcie_lanes = rv370_set_pcie_lanes,
+ .set_clock_gating = radeon_legacy_set_clock_gating,
+ .set_surface_reg = r100_set_surface_reg,
+ .clear_surface_reg = r100_clear_surface_reg,
+ .bandwidth_update = r100_bandwidth_update,
+ .hpd_init
Re: [PATCH 0/5] clean up radeon_asic.h v2
On Fri, Mar 12, 2010 at 10:25:56AM +0100, Jerome Glisse wrote: I would merge patch 1 2 into a single patch, I've split this up to make patch-reading easier. And it's fully bisectable. ... also i think you include radeon_asic.h at top of radeon.h so everyfile would also include radeon_asic.h that would be simplier than adding include to file and reduce the likelyhood to forget doing so in the future. (you might need to add forward declaration like struct radeon; at top of radeon_asic.h no biggy thought). I disagree. It's not quite there yet, but when all the asic specific stuff is gathered in radeon_asic.h (like I've done for r100 in my last patch), radeon_asic.h is the private header for asic stuff. And radeon.h is the public interface for radeon_asic. Then adding #include radeon_asic.h in random places would serve as a warning sign that there's likely a layering violation ahead. After all, generic code should not muck around in the asic private stuff. Unconditionally including radeon_asic.h therefore runs counter to the bigger idea behind my patches. Cheers, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: regression in 2.6.32-rc1 [KMS, I915] git-bisected
Hi Martin, Please open a bug report at http://bugs.freedesktop.org/ intel problems are tracked there. Besides your problem report below, please add Xorg.log from a working setup (user-mode-setting) and the dmesg with full debugging (add drm.debug=15 to your kernel commandline). See http://intellinuxgraphics.org/how_to_report_bug.html for the details of what else is needed. Yours, Daniel On Sun, Mar 14, 2010 at 01:19:10AM +0100, Martin Fahr wrote: Hi, Linux v2.6.32-rc1 introduced a bug for me, which gives me a black screen on my laptop when booting with KMS switched on. Starting X does not change that, i.e. I don't get any graphics to see. Except for this, the system runs fine, and the backlight of the LCD display is on. If I switch KMS off, the system runs perfectly. I reported this problem before, but did not get any response. In the meantime, I used git-bisect to find the responsible commit: commit e70236a8d3d0a4c100a0b9f7d394d9bda9c56aca Author: Jesse Barnes jbar...@virtuousgeek.org Date: Mon Sep 21 10:42:27 2009 -0700 drm/i915: split display functions by chip type This patch splits out several of the display functions into a separate display function table to avoid tons of chipset specific if..else if..else if blocks all over. There are more opportunities for this (some noted in the structure defintition); so more cleanup patches will follow. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Signed-off-by: Eric Anholt e...@anholt.net Double-checked that by unapplying the commit (KMS works), and reapplying it (KMS does not work). Kernels up to 2.6.34-rc1 do not solve the problem for me, and unfortunately, unapplying the patch to v2.6.32 or 2.6.33 results in conflicts. Framebuffer console and KMS on 2.6.31 worked fine, only X did not cooperate with that. Any help appreciated, and I will do my best to answer any questions. Running on Debian testing. lspci -v: 00:02.0 VGA compatible controller: Intel Corporation 82830 CGC [Chipset Graphics Controller] (rev 04) (prog-if 00 [VGA controller]) Subsystem: Samsung Electronics Co Ltd Device c002 Flags: bus master, fast devsel, latency 0, IRQ 10 Memory at e800 (32-bit, prefetchable) [size=128M] Memory at e000 (32-bit, non-prefetchable) [size=512K] Expansion ROM at unassigned [disabled] Capabilities: [d0] Power Management version 1 00:02.1 Display controller: Intel Corporation 82830 CGC [Chipset Graphics Controller] Subsystem: Samsung Electronics Co Ltd Device c002 Flags: bus master, fast devsel, latency 0 Memory at f000 (32-bit, prefetchable) [size=128M] Memory at e008 (32-bit, non-prefetchable) [size=512K] Capabilities: [d0] Power Management version 1 Thanks, Martin -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 3/6] drm/i915: introduce i915_gem_alloc_object
Just preparation, no functional change.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu/drm/i915/i915_gem.c | 12 +---
drivers/gpu/drm/i915/intel_display.c |2 +-
drivers/gpu/drm/i915/intel_fb.c |2 +-
drivers/gpu/drm/i915/intel_overlay.c |2 +-
5 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b7cb4aa..3d4e135 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -893,6 +893,8 @@ int i915_gem_get_aperture_ioctl(struct drm_device *dev,
void *data,
struct drm_file *file_priv);
void i915_gem_load(struct drm_device *dev);
int i915_gem_init_object(struct drm_gem_object *obj);
+struct drm_gem_object * i915_gem_alloc_object(struct drm_device *dev,
+ size_t size);
void i915_gem_free_object(struct drm_gem_object *obj);
int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
void i915_gem_object_unpin(struct drm_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d4ea909..92dd522 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -124,7 +124,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
args-size = roundup(args-size, PAGE_SIZE);
/* Allocate the new object */
- obj = drm_gem_object_alloc(dev, args-size);
+ obj = i915_gem_alloc_object(dev, args-size);
if (obj == NULL)
return -ENOMEM;
@@ -4421,6 +4421,12 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void
*data,
return 0;
}
+struct drm_gem_object * i915_gem_alloc_object(struct drm_device *dev,
+ size_t size)
+{
+ return drm_gem_object_alloc(dev, size);
+}
+
int i915_gem_init_object(struct drm_gem_object *obj)
{
struct drm_i915_gem_object *obj_priv;
@@ -4563,7 +4569,7 @@ i915_gem_init_hws(struct drm_device *dev)
if (!I915_NEED_GFX_HWS(dev))
return 0;
- obj = drm_gem_object_alloc(dev, 4096);
+ obj = i915_gem_alloc_object(dev, 4096);
if (obj == NULL) {
DRM_ERROR(Failed to allocate status page\n);
return -ENOMEM;
@@ -4640,7 +4646,7 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
if (ret != 0)
return ret;
- obj = drm_gem_object_alloc(dev, 128 * 1024);
+ obj = i915_gem_alloc_object(dev, 128 * 1024);
if (obj == NULL) {
DRM_ERROR(Failed to allocate ringbuffer\n);
i915_gem_cleanup_hws(dev);
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index eb9d825..bc775b6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4598,7 +4598,7 @@ intel_alloc_power_context(struct drm_device *dev)
struct drm_gem_object *pwrctx;
int ret;
- pwrctx = drm_gem_object_alloc(dev, 4096);
+ pwrctx = i915_gem_alloc_object(dev, 4096);
if (!pwrctx) {
DRM_DEBUG(failed to alloc power context, RC6 disabled\n);
return NULL;
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 8a0b3bc..c7af7e1 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -138,7 +138,7 @@ static int intelfb_create(struct drm_device *dev, uint32_t
fb_width,
size = mode_cmd.pitch * mode_cmd.height;
size = ALIGN(size, PAGE_SIZE);
- fbo = drm_gem_object_alloc(dev, size);
+ fbo = i915_gem_alloc_object(dev, size);
if (!fbo) {
DRM_ERROR(failed to allocate framebuffer\n);
ret = -ENOMEM;
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/gpu/drm/i915/intel_overlay.c
index 6d524a1..bc3721a 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1341,7 +1341,7 @@ void intel_setup_overlay(struct drm_device *dev)
return;
overlay-dev = dev;
- reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE);
+ reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE);
if (!reg_bo)
goto out_free;
overlay-reg_bo = to_intel_bo(reg_bo);
--
1.6.6.1
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[PATCH 1/6] drm: extract drm_gem_object_init
This function can be used by drivers who allocate the drm gem object
on their own. No functional change in here, just preparation.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_gem.c | 39 +--
include/drm/drmP.h|2 ++
2 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index aa89d4b..3b64d0e 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -124,6 +124,31 @@ drm_gem_destroy(struct drm_device *dev)
}
/**
+ * Initialize an already allocate GEM object of the specified size with
+ * shmfs backing store.
+ */
+int drm_gem_object_init(struct drm_device *dev,
+ struct drm_gem_object *obj, size_t size)
+{
+ BUG_ON((size (PAGE_SIZE - 1)) != 0);
+
+ obj-dev = dev;
+ obj-filp = shmem_file_setup(drm mm object, size, VM_NORESERVE);
+ if (IS_ERR(obj-filp))
+ return -ENOMEM;
+
+ kref_init(obj-refcount);
+ kref_init(obj-handlecount);
+ obj-size = size;
+
+ atomic_inc(dev-object_count);
+ atomic_add(obj-size, dev-object_memory);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_gem_object_init);
+
+/**
* Allocate a GEM object of the specified size with shmfs backing store
*/
struct drm_gem_object *
@@ -131,28 +156,22 @@ drm_gem_object_alloc(struct drm_device *dev, size_t size)
{
struct drm_gem_object *obj;
- BUG_ON((size (PAGE_SIZE - 1)) != 0);
-
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
if (!obj)
goto free;
- obj-dev = dev;
- obj-filp = shmem_file_setup(drm mm object, size, VM_NORESERVE);
- if (IS_ERR(obj-filp))
+ if (drm_gem_object_init(dev, obj, size) != 0)
goto free;
- kref_init(obj-refcount);
- kref_init(obj-handlecount);
- obj-size = size;
if (dev-driver-gem_init_object != NULL
dev-driver-gem_init_object(obj) != 0) {
goto fput;
}
- atomic_inc(dev-object_count);
- atomic_add(obj-size, dev-object_memory);
return obj;
fput:
+ /* Object_init mangles the global counters - readjust them. */
+ atomic_dec(dev-object_count);
+ atomic_sub(obj-size, dev-object_memory);
fput(obj-filp);
free:
kfree(obj);
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 2f3b3a0..b3b57b5 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1432,6 +1432,8 @@ void drm_gem_object_free(struct kref *kref);
void drm_gem_object_free_unlocked(struct kref *kref);
struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev,
size_t size);
+int drm_gem_object_init(struct drm_device *dev,
+ struct drm_gem_object *obj, size_t size);
void drm_gem_object_handle_free(struct kref *kref);
void drm_gem_vm_open(struct vm_area_struct *vma);
void drm_gem_vm_close(struct vm_area_struct *vma);
--
1.6.6.1
--
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[PATCH 2/6] drm: free core gem object from driver callbacks
When drivers embed the core gem object into their own structures,
they'll have to do this. Temporarily this results in an ugly
kfree(gem_obj);
in every gem driver.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_gem.c | 10 +++---
drivers/gpu/drm/i915/i915_gem.c |3 +++
drivers/gpu/drm/nouveau/nouveau_gem.c |3 +++
drivers/gpu/drm/radeon/radeon_gem.c |3 +++
include/drm/drmP.h|1 +
5 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 3b64d0e..33dad3f 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -422,15 +422,15 @@ drm_gem_release(struct drm_device *dev, struct drm_file
*file_private)
idr_destroy(file_private-object_idr);
}
-static void
-drm_gem_object_free_common(struct drm_gem_object *obj)
+void
+drm_gem_object_release(struct drm_gem_object *obj)
{
struct drm_device *dev = obj-dev;
fput(obj-filp);
atomic_dec(dev-object_count);
atomic_sub(obj-size, dev-object_memory);
- kfree(obj);
}
+EXPORT_SYMBOL(drm_gem_object_release);
/**
* Called after the last reference to the object has been lost.
@@ -448,8 +448,6 @@ drm_gem_object_free(struct kref *kref)
if (dev-driver-gem_free_object != NULL)
dev-driver-gem_free_object(obj);
-
- drm_gem_object_free_common(obj);
}
EXPORT_SYMBOL(drm_gem_object_free);
@@ -472,8 +470,6 @@ drm_gem_object_free_unlocked(struct kref *kref)
dev-driver-gem_free_object(obj);
mutex_unlock(dev-struct_mutex);
}
-
- drm_gem_object_free_common(obj);
}
EXPORT_SYMBOL(drm_gem_object_free_unlocked);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 80871c6..d4ea909 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4474,6 +4474,9 @@ void i915_gem_free_object(struct drm_gem_object *obj)
kfree(obj_priv-page_cpu_valid);
kfree(obj_priv-bit_17);
kfree(obj-driver_private);
+
+ drm_gem_object_release(obj);
+ kfree(obj);
}
/** Unbinds all inactive objects. */
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 0d22f66..cc6b191 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -57,6 +57,9 @@ nouveau_gem_object_del(struct drm_gem_object *gem)
}
ttm_bo_unref(bo);
+
+ drm_gem_object_release(gem);
+ kfree(gem);
}
int
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c
b/drivers/gpu/drm/radeon/radeon_gem.c
index ef92d14..833454a 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -44,6 +44,9 @@ void radeon_gem_object_free(struct drm_gem_object *gobj)
if (robj) {
radeon_bo_unref(robj);
}
+
+ drm_gem_object_release(gobj);
+ kfree(gobj);
}
int radeon_gem_object_create(struct radeon_device *rdev, int size,
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index b3b57b5..c1b9871 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1428,6 +1428,7 @@ extern void drm_sysfs_connector_remove(struct
drm_connector *connector);
/* Graphics Execution Manager library functions (drm_gem.c) */
int drm_gem_init(struct drm_device *dev);
void drm_gem_destroy(struct drm_device *dev);
+void drm_gem_object_release(struct drm_gem_object *obj);
void drm_gem_object_free(struct kref *kref);
void drm_gem_object_free_unlocked(struct kref *kref);
struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev,
--
1.6.6.1
--
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[PATCH 6/6] drm/i915: drop pointer to drm_gem_object
Luckily the change is quite a little bit less invasive than I've
feared.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_debugfs.c | 15 +++
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/i915_gem.c | 21 ++---
drivers/gpu/drm/i915/i915_gem_debug.c |2 +-
drivers/gpu/drm/i915/i915_irq.c |4 ++--
drivers/gpu/drm/i915/intel_overlay.c |6 +++---
6 files changed, 23 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index a0b8447..213aa3f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -96,19 +96,18 @@ static int i915_gem_object_list_info(struct seq_file *m,
void *data)
spin_lock(lock);
list_for_each_entry(obj_priv, head, list)
{
- struct drm_gem_object *obj = obj_priv-obj;
-
seq_printf(m, %p: %s %8zd %08x %08x %d%s%s,
- obj,
+ obj_priv-base,
get_pin_flag(obj_priv),
- obj-size,
- obj-read_domains, obj-write_domain,
+ obj_priv-base.size,
+ obj_priv-base.read_domains,
+ obj_priv-base.write_domain,
obj_priv-last_rendering_seqno,
obj_priv-dirty ? dirty : ,
obj_priv-madv == I915_MADV_DONTNEED ? purgeable
: );
- if (obj-name)
- seq_printf(m, (name: %d), obj-name);
+ if (obj_priv-base.name)
+ seq_printf(m, (name: %d), obj_priv-base.name);
if (obj_priv-fence_reg != I915_FENCE_REG_NONE)
seq_printf(m, (fence: %d), obj_priv-fence_reg);
if (obj_priv-gtt_space != NULL)
@@ -289,7 +288,7 @@ static int i915_batchbuffer_info(struct seq_file *m, void
*data)
spin_lock(dev_priv-mm.active_list_lock);
list_for_each_entry(obj_priv, dev_priv-mm.active_list, list) {
- obj = obj_priv-obj;
+ obj = obj_priv-base;
if (obj-read_domains I915_GEM_DOMAIN_COMMAND) {
ret = i915_gem_object_get_pages(obj, 0);
if (ret) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c5c7ce0..1b44ca7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -633,7 +633,6 @@ typedef struct drm_i915_private {
/** driver private structure attached to each drm_gem_object */
struct drm_i915_gem_object {
struct drm_gem_object base;
- struct drm_gem_object *obj;
/** Current space allocated to this object in the GTT, if any. */
struct drm_mm_node *gtt_space;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7c8c01b..47c46ed 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1566,7 +1566,7 @@ i915_gem_process_flushing_list(struct drm_device *dev,
list_for_each_entry_safe(obj_priv, next,
dev_priv-mm.gpu_write_list,
gpu_write_list) {
- struct drm_gem_object *obj = obj_priv-obj;
+ struct drm_gem_object *obj = obj_priv-base;
if ((obj-write_domain flush_domains) ==
obj-write_domain) {
@@ -1704,7 +1704,7 @@ i915_gem_retire_request(struct drm_device *dev,
obj_priv = list_first_entry(dev_priv-mm.active_list,
struct drm_i915_gem_object,
list);
- obj = obj_priv-obj;
+ obj = obj_priv-base;
/* If the seqno being retired doesn't match the oldest in the
* list, then the oldest in the list must still be newer than
@@ -2075,7 +2075,7 @@ i915_gem_find_inactive_object(struct drm_device *dev, int
min_size)
/* Try to find the smallest clean object */
list_for_each_entry(obj_priv, dev_priv-mm.inactive_list, list) {
- struct drm_gem_object *obj = obj_priv-obj;
+ struct drm_gem_object *obj = obj_priv-base;
if (obj-size = min_size) {
if ((!obj_priv-dirty ||
i915_gem_object_is_purgeable(obj_priv))
@@ -2209,7 +2209,7 @@ i915_gem_evict_something(struct drm_device *dev, int
min_size)
/* Find an object that we can immediately reuse */
list_for_each_entry(obj_priv,
dev_priv-mm.flushing_list, list) {
- obj = obj_priv-obj;
+ obj = obj_priv-base;
if (obj-size = min_size
[PATCH 5/6] drm/i915: don't use -driver_private anymore
Thanks to the to_intel_bo helper, this change is rather trivial.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |2 +-
drivers/gpu/drm/i915/i915_gem.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3d59e21..c5c7ce0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -732,7 +732,7 @@ struct drm_i915_gem_object {
atomic_t pending_flip;
};
-#define to_intel_bo(x) ((struct drm_i915_gem_object *) (x)-driver_private)
+#define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
/**
* Request queue structure.
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 23c67e0..7c8c01b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4440,7 +4440,7 @@ struct drm_gem_object * i915_gem_alloc_object(struct
drm_device *dev,
obj-agp_type = AGP_USER_MEMORY;
- obj-base.driver_private = obj;
+ obj-base.driver_private = NULL;
obj-obj = obj-base;
obj-fence_reg = I915_FENCE_REG_NONE;
INIT_LIST_HEAD(obj-list);
--
1.6.6.1
--
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[PATCH 0/6] make gem_object embedable and convert i915 driver
Hi all, As promised here's my patch series to make struct drm_gem_object embedable. Also converts drm/i915 as a proof of concept. I've already looked at the radeon and nouveau modules and a straightforward replament of the gem_object pointer looks simple. But I think embedding it into the ttm_bo is better long-term. Stuff like duplicated ref-counting between the ttm object and the gem one just doesn't make too much sense. Tested on my i945GM. The changes to radeon and nouveau in patch 2 are only compile-tested, but the identical change to the i915 survived testing. Comments on the patches and my future plans highly welcome. Yours, Daniel Daniel Vetter (6): drm: extract drm_gem_object_init drm: free core gem object from driver callbacks drm/i915: introduce i915_gem_alloc_object drm/i915: embed the gem object into drm_i915_gem_object drm/i915: don't use -driver_private anymore drm/i915: drop pointer to drm_gem_object drivers/gpu/drm/drm_gem.c | 49 +--- drivers/gpu/drm/i915/i915_debugfs.c | 15 +++--- drivers/gpu/drm/i915/i915_drv.h |6 ++- drivers/gpu/drm/i915/i915_gem.c | 80 ++--- drivers/gpu/drm/i915/i915_gem_debug.c |2 +- drivers/gpu/drm/i915/i915_irq.c |4 +- drivers/gpu/drm/i915/intel_display.c |2 +- drivers/gpu/drm/i915/intel_fb.c |2 +- drivers/gpu/drm/i915/intel_overlay.c |8 ++-- drivers/gpu/drm/nouveau/nouveau_gem.c |3 + drivers/gpu/drm/radeon/radeon_gem.c |3 + include/drm/drmP.h|3 + 12 files changed, 105 insertions(+), 72 deletions(-) -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 4/6] drm/i915: embed the gem object into drm_i915_gem_object
Just embed it and adjust the pointers, No other changes (that's
for later patches).
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c | 58 +++---
2 files changed, 30 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3d4e135..3d59e21 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -632,6 +632,7 @@ typedef struct drm_i915_private {
/** driver private structure attached to each drm_gem_object */
struct drm_i915_gem_object {
+ struct drm_gem_object base;
struct drm_gem_object *obj;
/** Current space allocated to this object in the GTT, if any. */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 92dd522..23c67e0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4424,37 +4424,38 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void
*data,
struct drm_gem_object * i915_gem_alloc_object(struct drm_device *dev,
size_t size)
{
- return drm_gem_object_alloc(dev, size);
-}
+ struct drm_i915_gem_object *obj;
-int i915_gem_init_object(struct drm_gem_object *obj)
-{
- struct drm_i915_gem_object *obj_priv;
+ obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+ if (obj == NULL)
+ return NULL;
- obj_priv = kzalloc(sizeof(*obj_priv), GFP_KERNEL);
- if (obj_priv == NULL)
- return -ENOMEM;
+ if (drm_gem_object_init(dev, obj-base, size) != 0) {
+ kfree(obj);
+ return NULL;
+ }
- /*
-* We've just allocated pages from the kernel,
-* so they've just been written by the CPU with
-* zeros. They'll need to be clflushed before we
-* use them with the GPU.
-*/
- obj-write_domain = I915_GEM_DOMAIN_CPU;
- obj-read_domains = I915_GEM_DOMAIN_CPU;
+ obj-base.write_domain = I915_GEM_DOMAIN_CPU;
+ obj-base.read_domains = I915_GEM_DOMAIN_CPU;
- obj_priv-agp_type = AGP_USER_MEMORY;
+ obj-agp_type = AGP_USER_MEMORY;
- obj-driver_private = obj_priv;
- obj_priv-obj = obj;
- obj_priv-fence_reg = I915_FENCE_REG_NONE;
- INIT_LIST_HEAD(obj_priv-list);
- INIT_LIST_HEAD(obj_priv-gpu_write_list);
- INIT_LIST_HEAD(obj_priv-fence_list);
- obj_priv-madv = I915_MADV_WILLNEED;
+ obj-base.driver_private = obj;
+ obj-obj = obj-base;
+ obj-fence_reg = I915_FENCE_REG_NONE;
+ INIT_LIST_HEAD(obj-list);
+ INIT_LIST_HEAD(obj-gpu_write_list);
+ INIT_LIST_HEAD(obj-fence_list);
+ obj-madv = I915_MADV_WILLNEED;
- trace_i915_gem_object_create(obj);
+ trace_i915_gem_object_create(obj-base);
+
+ return obj-base;
+}
+
+int i915_gem_init_object(struct drm_gem_object *obj)
+{
+ BUG();
return 0;
}
@@ -4477,12 +4478,11 @@ void i915_gem_free_object(struct drm_gem_object *obj)
if (obj_priv-mmap_offset)
i915_gem_free_mmap_offset(obj);
+ drm_gem_object_release(obj);
+
kfree(obj_priv-page_cpu_valid);
kfree(obj_priv-bit_17);
- kfree(obj-driver_private);
-
- drm_gem_object_release(obj);
- kfree(obj);
+ kfree(obj_priv);
}
/** Unbinds all inactive objects. */
--
1.6.6.1
--
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[SPAM] Re: 2.6.34-rc2: ima_dec_counts: open/free imbalance?
On Wed, Mar 31, 2010 at 04:32:34PM -0700, Andrew Morton wrote: On Sun, 28 Mar 2010 13:31:49 +0200 Thomas Meyer tho...@m3y3r.de wrote: This warning/error/notice is new in 2.6.34-rc2+: Let's add some cc's. It might be a DRM bug. I'll ask Rafael and Maciej to track this as a post-2.6.33 regression, thanks. I myself and a few testers have hit another strange inconsistency in the gem shm handling code which might be related (some internal refcount that gets out-of-sync and no refcount imbalances in the code). Unfortunately I can't reproduce it anymore and I currently don't yet have a clue about what's wrong. Currently I'm suspecting a locking goof-up. Is there a bugzilla entry to track this? -Daniel [ 1878.810147] PM: Syncing filesystems ... done. [ 1878.903316] Freezing user space processes ... (elapsed 0.01 seconds) done. [ 1878.916589] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done. [ 1878.929866] Suspending console(s) (use no_console_suspend to debug) [ 1878.930229] sd 0:0:0:0: [sda] Synchronizing SCSI cache [ 1878.930370] sd 0:0:0:0: [sda] Stopping disk [ 1878.981086] atl1c :01:00.0: PCI INT A disabled [ 1878.981369] uhci_hcd :00:1d.2: PCI INT D disabled [ 1878.981379] uhci_hcd :00:1d.1: PCI INT B disabled [ 1878.981389] uhci_hcd :00:1d.0: PCI INT A disabled [ 1878.981454] HDA Intel :00:1b.0: PCI INT A disabled [ 1878.981500] ACPI handle has no context! [ 1878.981529] ehci_hcd :00:1a.7: PCI INT D disabled [ 1878.981540] uhci_hcd :00:1a.0: PCI INT A disabled [ 1878.981602] IMA: unmeasured files on fsmagic: 1021994 [ 1878.981605] ima_dec_counts: open/free imbalance (r:0 w:-1 o:-1) [ 1878.981609] Pid: 4888, comm: async/10 Tainted: GW 2.6.34-rc2 #88 [ 1878.981612] Call Trace: [ 1878.981620] [c0886ac2] ? printk+0x1d/0x23 [ 1878.981627] [c05f966f] ima_file_free+0x16f/0x210 [ 1878.981632] [c04d7132] __fput+0xf2/0x1f0 [ 1878.981636] [c04d724d] fput+0x1d/0x30 [ 1878.981641] [c06cbd2f] drm_gem_object_free_common+0x1f/0x40 [ 1878.981645] [c06cbdd0] ? drm_gem_object_free+0x0/0x40 [ 1878.981649] [c06cbe01] drm_gem_object_free+0x31/0x40 [ 1878.981653] [c061d20c] kref_put+0x2c/0x60 [ 1878.981658] [c06e8078] i915_gem_cleanup_ringbuffer+0x48/0x70 [ 1878.981662] [c06e97ec] i915_gem_idle+0x9c/0x120 [ 1878.981666] [c06dcefd] i915_drm_freeze+0x3d/0xa0 [ 1878.981670] [c06dd01e] i915_pm_suspend+0x2e/0x80 [ 1878.981674] [c08871ca] ? wait_for_common+0x1a/0x100 [ 1878.981679] [c0636269] pci_pm_suspend+0x49/0x110 [ 1878.981682] [c0636220] ? pci_pm_suspend+0x0/0x110 [ 1878.981687] [c07194f1] pm_op+0x181/0x1d0 [ 1878.981691] [c07126f4] ? device_for_each_child+0x54/0x60 [ 1878.981695] [c0719eaf] __device_suspend+0xbf/0x110 [ 1878.981699] [c071a2f3] async_suspend+0x23/0x60 [ 1878.981703] [c044ff25] async_thread+0xc5/0x210 [ 1878.981707] [c0886e31] ? schedule+0x1e1/0x450 [ 1878.981713] [c042c030] ? default_wake_function+0x0/0x20 [ 1878.981716] [c044fe60] ? async_thread+0x0/0x210 [ 1878.981720] [c0449254] kthread+0x74/0x80 [ 1878.981724] [c04491e0] ? kthread+0x0/0x80 [ 1878.981728] [c04034be] kernel_thread_helper+0x6/0x10 [ 1878.986489] iint_free: writecount: -1 [ 1878.986492] iint_free: opencount: -1 [ 1878.986494] iint_free: writecount: -1 [ 1878.986496] iint_free: opencount: -1 [ 1878.993205] ehci_hcd :00:1d.7: PCI INT A disabled [ 1879.649836] PM: suspend of devices complete after 719.812 msecs [ 1879.676555] PM: late suspend of devices complete after 26.714 msecs [ 1879.677144] ACPI: Preparing to enter system sleep state S3 [ 1879.677144] Back to C! Does anybody care? mfg thomas -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[SPAM] Re: [PATCH 0/6] make gem_object embedable and convert i915 driver
On Mon, Apr 12, 2010 at 10:51:20AM -0700, Eric Anholt wrote: On Fri, 9 Apr 2010 21:05:03 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: Daniel Vetter (6): drm: extract drm_gem_object_init drm: free core gem object from driver callbacks drm/i915: introduce i915_gem_alloc_object drm/i915: embed the gem object into drm_i915_gem_object drm/i915: don't use -driver_private anymore drm/i915: drop pointer to drm_gem_object I like this series. Dave, should I pull this one? Cool. wrt merging I'd prefer if Dave could take the first two via drm-core. That way round I could start working on the radeon/nouveau stuff independently of the i915 stuff. That'd stall i915 slightly but i915 is the easiest conversion (that's why I did it first) so I can quickly rebase in case of conflicts. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[SPAM] [PATCH 0/3] clean up drm agp
Hi all, This is a small series to cleanup some cruft I've stumbled upon while crawling through the intel agp/gtt stuff. The first patch is part of my intel-gtt crusade. To avoid merge conflicts it would be great if this could go into drm-core-next before Eric's rebasing his drm-intel-next on it (due to my make-gem-embeddable work). Tested on my agp rv570 and my i945 with no ill effects. Please review and merge. Thanks, Daniel Daniel Vetter (3): drm: kill drm_agp_chipset_flush drm: drop return value of drm_free_agp drm: kill agp indirection mess drivers/gpu/drm/drm_agpsupport.c | 47 +++-- drivers/gpu/drm/drm_memory.c | 14 +++ drivers/gpu/drm/i915/i915_gem.c |8 +++--- include/drm/drmP.h |8 +- 4 files changed, 13 insertions(+), 64 deletions(-) -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[SPAM] [PATCH 3/3] drm: kill agp indirection mess
There's no point in jumping through two indirections. So kill one
and call the kernels agp functions directly.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_agpsupport.c | 40 +++--
drivers/gpu/drm/drm_memory.c | 12 ++
include/drm/drmP.h |5
3 files changed, 7 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu/drm/drm_agpsupport.c
index 54cfbc4..ce2ff1d 100644
--- a/drivers/gpu/drm/drm_agpsupport.c
+++ b/drivers/gpu/drm/drm_agpsupport.c
@@ -193,7 +193,7 @@ int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
* \return zero on success or a negative number on failure.
*
* Verifies the AGP device is present and has been acquired, allocates the
- * memory via alloc_agp() and creates a drm_agp_mem entry for it.
+ * memory via agp_allocate_memory() and creates a drm_agp_mem entry for it.
*/
int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request)
{
@@ -211,7 +211,7 @@ int drm_agp_alloc(struct drm_device *dev, struct
drm_agp_buffer *request)
pages = (request-size + PAGE_SIZE - 1) / PAGE_SIZE;
type = (u32) request-type;
- if (!(memory = drm_alloc_agp(dev, pages, type))) {
+ if (!(memory = agp_allocate_memory(dev-agp-bridge, pages, type))) {
kfree(entry);
return -ENOMEM;
}
@@ -423,38 +423,6 @@ struct drm_agp_head *drm_agp_init(struct drm_device *dev)
return head;
}
-/** Calls agp_allocate_memory() */
-DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data * bridge,
-size_t pages, u32 type)
-{
- return agp_allocate_memory(bridge, pages, type);
-}
-
-/** Calls agp_free_memory() */
-int drm_agp_free_memory(DRM_AGP_MEM * handle)
-{
- if (!handle)
- return 0;
- agp_free_memory(handle);
- return 1;
-}
-
-/** Calls agp_bind_memory() */
-int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start)
-{
- if (!handle)
- return -EINVAL;
- return agp_bind_memory(handle, start);
-}
-
-/** Calls agp_unbind_memory() */
-int drm_agp_unbind_memory(DRM_AGP_MEM * handle)
-{
- if (!handle)
- return -EINVAL;
- return agp_unbind_memory(handle);
-}
-
/**
* Binds a collection of pages into AGP memory at the given offset, returning
* the AGP memory structure containing them.
@@ -474,7 +442,7 @@ drm_agp_bind_pages(struct drm_device *dev,
DRM_DEBUG(\n);
- mem = drm_agp_allocate_memory(dev-agp-bridge, num_pages,
+ mem = agp_allocate_memory(dev-agp-bridge, num_pages,
type);
if (mem == NULL) {
DRM_ERROR(Failed to allocate memory for %ld pages\n,
@@ -487,7 +455,7 @@ drm_agp_bind_pages(struct drm_device *dev,
mem-page_count = num_pages;
mem-is_flushed = true;
- ret = drm_agp_bind_memory(mem, gtt_offset / PAGE_SIZE);
+ ret = agp_bind_memory(mem, gtt_offset / PAGE_SIZE);
if (ret != 0) {
DRM_ERROR(Failed to bind AGP memory: %d\n, ret);
agp_free_memory(mem);
diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index 84f0f52..08550d6 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -99,29 +99,23 @@ static void *agp_remap(unsigned long offset, unsigned long
size,
return addr;
}
-/** Wrapper around agp_allocate_memory() */
-DRM_AGP_MEM *drm_alloc_agp(struct drm_device * dev, int pages, u32 type)
-{
- return drm_agp_allocate_memory(dev-agp-bridge, pages, type);
-}
-
/** Wrapper around agp_free_memory() */
void drm_free_agp(DRM_AGP_MEM * handle, int pages)
{
- drm_agp_free_memory(handle);
+ agp_free_memory(handle);
}
EXPORT_SYMBOL(drm_free_agp);
/** Wrapper around agp_bind_memory() */
int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start)
{
- return drm_agp_bind_memory(handle, start);
+ return agp_bind_memory(handle, start);
}
/** Wrapper around agp_unbind_memory() */
int drm_unbind_agp(DRM_AGP_MEM * handle)
{
- return drm_agp_unbind_memory(handle);
+ return agp_unbind_memory(handle);
}
EXPORT_SYMBOL(drm_unbind_agp);
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index a32ed3c..7392d04 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1161,7 +1161,6 @@ extern int drm_mem_info(char *buf, char **start, off_t
offset,
extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
extern void drm_free_agp(DRM_AGP_MEM * handle, int pages);
-extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type);
extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
struct page **pages,
@@ -1337,10 +1336,6 @@ extern int
[SPAM] [PATCH 1/3] drm: kill drm_agp_chipset_flush
This is only used by the gem code in the i915 drm driver. Not point
in abstracting this simple call. Furthermore I want to integrate the
gtt handling from intel-agp much tighter with the gem code in the
drm module, so this indirection through the agp will vanish, anyway.
The reason for this is a rather gross amount of fragile code duplication
between these two parts of the kernel intel graphics driver.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_agpsupport.c |7 ---
drivers/gpu/drm/i915/i915_gem.c |8
include/drm/drmP.h |1 -
3 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu/drm/drm_agpsupport.c
index ba38e01..54cfbc4 100644
--- a/drivers/gpu/drm/drm_agpsupport.c
+++ b/drivers/gpu/drm/drm_agpsupport.c
@@ -497,11 +497,4 @@ drm_agp_bind_pages(struct drm_device *dev,
return mem;
}
EXPORT_SYMBOL(drm_agp_bind_pages);
-
-void drm_agp_chipset_flush(struct drm_device *dev)
-{
- agp_flush_chipset(dev-agp-bridge);
-}
-EXPORT_SYMBOL(drm_agp_chipset_flush);
-
#endif /* __OS_HAS_AGP */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 47c46ed..6e71b5b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1901,7 +1901,7 @@ i915_gem_flush(struct drm_device *dev,
invalidate_domains, flush_domains);
if (flush_domains I915_GEM_DOMAIN_CPU)
- drm_agp_chipset_flush(dev);
+ agp_flush_chipset(dev-agp-bridge);
if ((invalidate_domains | flush_domains) I915_GEM_GPU_DOMAINS) {
/*
@@ -2795,7 +2795,7 @@ i915_gem_object_flush_cpu_write_domain(struct
drm_gem_object *obj)
return;
i915_gem_clflush_object(obj);
- drm_agp_chipset_flush(dev);
+ agp_flush_chipset(dev-agp-bridge);
old_write_domain = obj-write_domain;
obj-write_domain = 0;
@@ -4962,7 +4962,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
kunmap_atomic(dst, KM_USER0);
}
drm_clflush_pages(obj_priv-pages, page_count);
- drm_agp_chipset_flush(dev);
+ agp_flush_chipset(dev-agp-bridge);
i915_gem_object_put_pages(obj);
out:
@@ -5047,7 +5047,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct
drm_gem_object *obj,
if (ret)
return -EFAULT;
- drm_agp_chipset_flush(dev);
+ agp_flush_chipset(dev-agp-bridge);
return 0;
}
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index c1b9871..12ffa05 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1341,7 +1341,6 @@ extern DRM_AGP_MEM *drm_agp_allocate_memory(struct
agp_bridge_data *bridge, size
extern int drm_agp_free_memory(DRM_AGP_MEM * handle);
extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start);
extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle);
-extern void drm_agp_chipset_flush(struct drm_device *dev);
/* Stub support (drm_stub.h) */
extern int drm_setmaster_ioctl(struct drm_device *dev, void *data,
--
1.6.6.1
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[SPAM] [PATCH 2/3] drm: drop return value of drm_free_agp
No caller (rightly) cares about it, so drop it.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_memory.c |4 ++--
include/drm/drmP.h |2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index e4865f9..84f0f52 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -106,9 +106,9 @@ DRM_AGP_MEM *drm_alloc_agp(struct drm_device * dev, int
pages, u32 type)
}
/** Wrapper around agp_free_memory() */
-int drm_free_agp(DRM_AGP_MEM * handle, int pages)
+void drm_free_agp(DRM_AGP_MEM * handle, int pages)
{
- return drm_agp_free_memory(handle) ? 0 : -EINVAL;
+ drm_agp_free_memory(handle);
}
EXPORT_SYMBOL(drm_free_agp);
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 12ffa05..a32ed3c 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1160,8 +1160,8 @@ extern int drm_mem_info(char *buf, char **start, off_t
offset,
int request, int *eof, void *data);
extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
+extern void drm_free_agp(DRM_AGP_MEM * handle, int pages);
extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type);
-extern int drm_free_agp(DRM_AGP_MEM * handle, int pages);
extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
struct page **pages,
--
1.6.6.1
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Re: regression(?) 3.3-rc4 - 3.3-rc5: drm intel hangs
On Tue, Feb 28, 2012 at 01:03:27PM +0900, Norbert Preining wrote:
Dear all,
(please Cc)
since upgrade to 3.3-rc5 I see the following behaviour repeatedly:
Feb 28 11:42:47 mithrandir kernel: [15627.756071]
[drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer elapsed... GPU hung
Feb 28 11:42:47 mithrandir kernel: [15627.756087] [drm] capturing error
event; look for more information in /debug/dri/0/i915_error_state
Wee need this i915_error_state file from debugfs (you might need to mount
that first again) to diagnose gpu hangs. Also, it only contains
information after a crash, so you need to rehang your machine if you've
rebooted since then.
Thanks, Daniel
Feb 28 11:42:47 mithrandir kernel: [15627.758428] [drm:i915_wait_request]
*ERROR* i915_wait_request returns -11 (awaiting 7 at 4, next 8)
Feb 28 11:42:47 mithrandir kernel: [15628.260094] [drm:i915_reset] *ERROR*
Failed to reset chip.
Is this is known issue?
hardware Intel GM45 Chipset
more dmesg parts:
[0.566805] agpgart-intel :00:00.0: Intel GM45 Chipset
[0.566925] agpgart-intel :00:00.0: detected gtt size: 2097152K total,
262144K mappable
[0.569079] agpgart-intel :00:00.0: detected 65536K stolen memory
[0.569278] agpgart-intel :00:00.0: AGP aperture is 256M @ 0xc000
...
[2.032297] [drm] Initialized drm 1.1.0 20060810
[2.032372] i915 :00:02.0: power state changed by ACPI to D0
[2.032429] i915 :00:02.0: power state changed by ACPI to D0
[2.032489] i915 :00:02.0: setting latency timer to 64
[2.085250] i915 :00:02.0: irq 43 for MSI/MSI-X
[2.085260] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[2.085318] [drm] Driver supports precise vblank timestamp query.
[2.085439] [drm:intel_dsm_pci_probe] *ERROR* failed to get supported _DSM
functions
[2.085527] vgaarb: device changed decodes:
PCI::00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
[2.769842] fbcon: inteldrmfb (fb0) is primary device
[2.771391] [drm] Changing LVDS panel from (+hsync, +vsync) to (-hsync,
-vsync)
[3.304756] Console: switching to colour frame buffer device 200x56
[3.308853] fb0: inteldrmfb frame buffer device
[3.308855] drm: registered panic notifier
[3.329552] acpi device:01: registered as cooling_device2
[3.329713] input: Video Bus as
/devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input2
[3.329766] ACPI: Video Device [OVGA] (multi-head: yes rom: no post: no)
[3.329881] [drm] Initialized i915 1.6.0 20080730 for :00:02.0 on
minor 0
Best wishes
Norbert
Norbert Preiningpreining@{jaist.ac.jp, logic.at, debian.org}
JAIST, Japan TeX Live Debian Developer
DSA: 0x09C5B094 fp: 14DF 2E6C 0307 BE6D AD76 A9C0 D2BF 4AA3 09C5 B094
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Re: [PATCH] fbcon: fix locking harder
On Fri, Jan 25, 2013 at 2:43 AM, Dave Airlie airl...@gmail.com wrote:
Okay so Alan's patch handled the case where there was no registered fbcon,
however the other path entered in set_con2fb_map pit.
In there we called fbcon_takeover, but we also took the console lock in a
couple
of places. So push the console lock out to the callers of set_con2fb_map,
this means fbmem and switcheroo needed to take the lock around the fb notifier
entry points that lead to this.
This should fix the efifb regression seen by Maarten.
Signed-off-by: Dave Airlie airl...@redhat.com
---
drivers/gpu/vga/vga_switcheroo.c | 3 +++
drivers/video/console/fbcon.c| 11 ---
drivers/video/fbmem.c| 2 ++
3 files changed, 13 insertions(+), 3 deletions(-)
[cut]
ret = vgasr_priv.handler-switchto(new_client-id);
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 2aef9ca..2e2d959 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -842,6 +842,8 @@ static void con2fb_init_display(struct vc_data *vc,
struct fb_info *info,
*
* Maps a virtual console @unit to a frame buffer device
* @newidx.
+ *
+ * This should be called with the console lock held.
*/
static int set_con2fb_map(int unit, int newidx, int user)
{
What about throwing a WARN_CONSOLE_UNLOCKED(); in here to make sure
this new rule is obeyed?
-Daniel
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Re: [PATCH 2/2] drm/vmwgfx: Use the linux DMA api to get valid device addresses of pages
);
+ (++desc_virtual)-ppn = DMA_PAGE_INVALID;
desc_virtual-num_pages = cpu_to_le32(0);
+ kunmap_atomic(page_virtual);
}
- if (likely(page_virtual != NULL))
+ desc_dma = 0;
+ list_for_each_entry_reverse(page, desc_pages, lru) {
+ page_virtual = kmap_atomic(page);
+ page_virtual[desc_per_page].ppn = desc_dma PAGE_SHIFT;
kunmap_atomic(page_virtual);
+ desc_dma = dma_map_page(dev, page, 0, PAGE_SIZE,
+ DMA_TO_DEVICE);
+
+ if (unlikely(dma_mapping_error(dev, desc_dma)))
+ goto out_err;
+ }
+ *first_dma = desc_dma;
return 0;
out_err:
- list_for_each_entry_safe(page, next, desc_pages, lru) {
- list_del_init(page-lru);
- __free_page(page);
- }
+ vmw_gmr_free_descriptors(dev, DMA_ADDR_INVALID, desc_pages);
return ret;
}
-static inline void vmw_gmr_free_descriptors(struct list_head *desc_pages)
-{
- struct page *page, *next;
-
- list_for_each_entry_safe(page, next, desc_pages, lru) {
- list_del_init(page-lru);
- __free_page(page);
- }
-}
-
static void vmw_gmr_fire_descriptors(struct vmw_private *dev_priv,
- int gmr_id, struct list_head *desc_pages)
+ int gmr_id, dma_addr_t desc_dma)
{
- struct page *page;
-
- if (unlikely(list_empty(desc_pages)))
- return;
-
- page = list_entry(desc_pages-next, struct page, lru);
-
mutex_lock(dev_priv-hw_mutex);
vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
wmb();
- vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, page_to_pfn(page));
+ vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, desc_dma PAGE_SHIFT);
mb();
mutex_unlock(dev_priv-hw_mutex);
}
-/**
- * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
- * the number of used descriptors.
- */
-
-static unsigned long vmw_gmr_count_descriptors(struct page *pages[],
- unsigned long num_pages)
-{
- unsigned long prev_pfn = ~(0UL);
- unsigned long pfn;
- unsigned long descriptors = 0;
-
- while (num_pages--) {
- pfn = page_to_pfn(*pages++);
- if (prev_pfn + 1 != pfn)
- ++descriptors;
- prev_pfn = pfn;
- }
-
- return descriptors;
-}
-
int vmw_gmr_bind(struct vmw_private *dev_priv,
- struct page *pages[],
+ const struct vmw_sg_table *vsgt,
unsigned long num_pages,
int gmr_id)
{
struct list_head desc_pages;
+ dma_addr_t desc_dma = 0;
+ struct device *dev = dev_priv-dev-dev;
+ struct vmw_piter data_iter;
int ret;
+ vmw_piter_start(data_iter, vsgt, 0);
+
+ if (unlikely(!vmw_piter_next(data_iter)))
+ return 0;
+
if (likely(dev_priv-capabilities SVGA_CAP_GMR2))
- return vmw_gmr2_bind(dev_priv, pages, num_pages, gmr_id);
+ return vmw_gmr2_bind(dev_priv, data_iter, num_pages, gmr_id);
if (unlikely(!(dev_priv-capabilities SVGA_CAP_GMR)))
return -EINVAL;
- if (vmw_gmr_count_descriptors(pages, num_pages)
- dev_priv-max_gmr_descriptors)
+ if (vsgt-num_regions dev_priv-max_gmr_descriptors)
return -EINVAL;
INIT_LIST_HEAD(desc_pages);
- ret = vmw_gmr_build_descriptors(desc_pages, pages, num_pages);
+ ret = vmw_gmr_build_descriptors(dev, desc_pages, data_iter,
+ num_pages, desc_dma);
if (unlikely(ret != 0))
return ret;
- vmw_gmr_fire_descriptors(dev_priv, gmr_id, desc_pages);
- vmw_gmr_free_descriptors(desc_pages);
+ vmw_gmr_fire_descriptors(dev_priv, gmr_id, desc_dma);
+ vmw_gmr_free_descriptors(dev, desc_dma, desc_pages);
return 0;
}
--
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