RE: Tetanization
The disease tetanus used to be called lock jaw, if I remember correctly. So, if that implies a real symptom of the disease (I have no idea), then the word tetanus may have a common meaning with the can't let go symptom discussed here. // Jack Cook, Xerox EMC -Original Message- From: John Woodgate [mailto:j...@jmwa.demon.co.uk] Sent: Thursday, November 15, 2001 12:39 AM To: emc-p...@majordomo.ieee.org Subject: Re: Tetanization I read in !emc-pstc that Price, Ed ed.pr...@cubic.com wrote (in b78135310217d511907c0090273f5190d0b...@curly.ds.cubic.com) about 'Tetanization', on Wed, 14 Nov 2001: I was discussing tetanus with my wife. She checked some of her old textbooks and found the attached explanation of tetanus and a very good graphic. In the field of electric shock, tetanus is the technical term describing what we commonly refer to as can't let go. Tetanus occurs in the range of 7 to 50 mA. It seems to me that the actual word 'tetanus' is not used for this in Britain, maybe because of the risk of confusion with the infection. -- Regards, John Woodgate, OOO - Own Opinions Only. http://www.jmwa.demon.co.uk Eat mink and be dreary! --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server.
RE: EN 55022 limits
Yes, but ... EN55022:1998 (10.2.1) says measurements at other distances can be made with Class B ITE ... measurement at 10 m cannot be made because of high ambient noise levels, or for other reasons, Are you interpreting the other reasons as meaning if one doesn't have a 10 m facility, then it's ok to test at 3 m? I'm a tiny bit skeptical that this was the intent. Or has this practice been accepted? Regards, Jack Cook, Xerox EMC Engineering -Original Message- From: Peters, Michael [mailto:mpet...@analogic.com] Sent: Tuesday, October 30, 2001 7:22 PM To: 'Stuart Lopata '; 'emc ' Subject: RE: EN 55022 limits Stuart, Cispr 22:1997 clause 10.2.1 answers your question. The earlier version of Cispr 22 has similar wording. For Class B equipment you may use a 20 dB/decade extrapolation to correct measured data, to compare to the limits, at closer distances. The rules do not say that the same is allowed for Class A equipment. Going from 3 to 10 meters: You would subtract 10.5 dB from your measurements (the formula is given in clause 10.6). Michael Peters -Original Message- From: Stuart Lopata To: emc Sent: 10/30/01 10:06 AM Subject: EN 55022 limits The radiated limits are stated for 10 meters but our measurements are at 3 meters. Is it ok to use 3 meter data and what should the new limits be (may be 10 dB higher)? Thanks, Stuart Lopata --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server. --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server. --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server.
RE: skinny power cords.
Rich, Ok. That makes sense. Thanks for the follow-up. This is scary stuff! Jack Cook Xerox EMC Engineering -Original Message- From: Rich Nute [mailto:ri...@sdd.hp.com] Sent: Thursday, October 25, 2001 2:11 PM To: jack.c...@cax.usa.xerox.com Cc: emc-p...@majordomo.ieee.org Subject: Re: skinny power cords. Hi Jack: I'm having a problem with Rich's explanation in this particular case (I know it's often true, though). How did resisitive heating occur *without* current flow? It was clearly stated that the heater was switched OFF. I believe that the process I described takes a lot of time. It starts when the heater is first used, i.e., a heavy current through the plug and socket. The heating due to the contact resistance degrades the material between the blades of the plug due to pyrolysis, the decomposition of a material by heat alone. The decomposition results in unknown materials between the blades. Plastics are carbon-based. Decomposition of carbon-based materials tends to reduce the size of the molecule, and the material approaches pure carbon, a resistor. So, we can assume that these unknown materials are resistive. We will have a leakage current through the resistance. Once the leakage path is established, the heater does not need to be on for the process to continue. Since this isn't a good resistance, some elements will open, and micro-arcs will occur. These micro- arcs create new resistances, and the leakage current will continue to increase. And the arcs get bigger. Etc. I could be wrong... Best regards, Rich --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server.
RE: Shrunk-die power MOSFET's and compliance
The practice of die shrinking speedups causes problems in the digital IC arena also. The old but once heavily used 8051 processor is an example. Original designs were with the NMOS (HMOS?) version but later began being replaced by faster CMOS versions. We could see some of that clearly in certain product audits. Jack Cook, Xerox EMC Engineering -Original Message- From: Dan Kwok [mailto:dk...@intetron.com] Sent: Thursday, October 25, 2001 1:16 PM To: Jim Eichner; 'EMC-PSTC - forum' Subject: Re: Shrunk-die power MOSFET's and compliance Jim, You have my sympathies. Some manufacturers don't seem to realize that their so called product improvements may actually cause undue grief and hardships on their customers. Specifications subject to change without notice is a common catch clause associated with far many products on the market these days. In one company where I worked many years ago, we had an incoming inspection department that routinely carried out random samplings and measured critical parameters for crystals and semiconductors. With this approach, most out-of-spec devices simply did not make it to the store bins. On the brighter side, speeding up a FET is hard to do. Slowing it down in a circuit is much easier for EMC purposes. - Dan Kwok, P.Eng. Principal Engineer Electromagnetic Compatibility Intetron Consulting, Inc. Ph (604) 432-9874 E-mail dk...@intetron.com Internet http://www.intetron.com - Original Message - From: Jim Eichner jim.eich...@xantrex.com To: mertino...@skyskan.com; Jim Eichner jim.eich...@xantrex.com; 'EMC-PSTC - forum' emc-p...@majordomo.ieee.org Sent: Wednesday, October 24, 2001 11:54 AM Subject: RE: Shrunk-die power MOSFET's and compliance Well for example, I have just finished specifying what compliance re-testing I am going to need to do on 4 different products whose power conversion stages use IRF630's, IRF740's, IRF840's, and RFP50N06's, but the list goes on and on. If you are using power FET's in power electronics, chances are they have changed or will soon. The main manufacturers that come to mind are IR, Fairchild/Harris, Philips, and STM-Thomson. Not all have forced changes to the shrunk-die version - some have agreed to keep the old style available - and all have at least added a suffix to their markings on the devices so you can tell if it's the new revision die or old. In one case, however, we received modified parts with no markings differentiating them from the old rev parts, for almost a year with no communication from the mfr telling us about the change. We found out through other channels and then contacted them. They seem to be behaving as if fundamental changes to the performance and specifications of the part are none of our business. I am re-doing radiated and conducted emissions, some thermal testing, and a bunch of functional testing and looking at waveforms on 4 different products affected by this change. Those are only the products I am responsible for - as a company we're doing functional testing and possibly compliance re-testing on many more products. This is not a simple component substitution exercise, if your products are or use power electronics! I would advise everyone potentially affected to have your procurement department look into this. Regards, Jim Eichner, P.Eng. Manager, Engineering Services Xantrex Technology Inc. Mobile Power web: www.xantrex.com http://www.xantrex.com Any opinions expressed are those of my invisible friend, who really exists. Honest. --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server. --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute:
RE: skinny power cords.
Don't really have time for this, but ... I'm having a problem with Rich's explanation in this particular case (I know it's often true, though). How did resisitive heating occur *without* current flow? It was clearly stated that the heater was switched OFF. But then striking an arc between the flat blades is hard to explain also. An in-plug fuse would not have helped in that case. //Jack -Original Message- From: Jim Eichner [mailto:jim.eich...@xantrex.com] Sent: Thursday, October 25, 2001 12:40 PM Cc: emc-p...@majordomo.ieee.org Subject: RE: skinny power cords. Thanks Rich: I suspect you're right. Isn't that mechanism exactly what the tracking index tests are meant to address? I thought that any UL-approved wiring device like this would have a material that is designed to resist tracking, hence my speculation that contamination might be involved. I guess there are a few more comments to be made here... 1. From what I know, the tracking index tests are horribly non-repeatable and are therefore somewhat meaningless. 2. The standards for plug caps and for multi-taps may not refer to UL746 and may not have any of their own requirements for tracking index of insulation. 3. We could take this as evidence that even compliance with the tracking index requirements doesn't prevent carbonization of the material where there's a high temperature heat source involved. There are lots of people who unplug anything they are not actively using. I guess it's not such a paranoid practice! Regards, Jim Eichner, P.Eng. Manager, Engineering Services Xantrex Technology Inc. Mobile Power web: www.xantrex.com http://www.xantrex.com Any opinions expressed are those of my invisible friend, who really exists. Honest. -Original Message- From: Rich Nute [mailto:ri...@sdd.hp.com] Sent: Thursday, October 25, 2001 12:14 PM To: jim.eich...@xantrex.com Cc: emc-p...@majordomo.ieee.org Subject: Re: skinny power cords. Hi Jim: I'm curious: given that North American plug blades are 1/2 apart, there must have been substantial contamination to aid in 120Vac jumping that far (arcing). Did you identify any sort of contamination or moisture? I don't believe contamination is a significant factor in events such as this one. I believe such events start with a loose connection between the plug and the socket (or between the wire and the socket parts). A loose connection means that the contact area is relatively small. In turn, this means high current density at the point of contact. The smaller the contact area, the greater the resistance of the contact. The smaller the contact area, the greater the current density at the point of contact. These two factors contribute to heating of the two parts, the plug blade and the socket. Heating tends to reduce the springiness of the socket part, and of the connection between the supply wire and the socket (because they are thermally connected). The heating also tends to degrade the surface of the insulating material in which the conductors are mounted. Heating also enhances oxidation of the plating on the parts, which further increases the resistance of the connections. If the plug-connected appliance is ON, arcing can occur as the parts expand due to heating and make various intermittant connections. Arc temperatures are very high, and can burn the surface of nearby insulating materials via radiation. As the surface degrades, leakages occur across the surfaces. At this point, whether or not the appliance is on or even connected is not a factor. There is a current path between the two poles along the surface of the insulator. This can either be between the socket parts, or between the wired parts. The leakage current causes further heating and micro-arcs where the leakage path opens due to current density. The micro-arcs further damage the insulator until there is nearly continuous micro-arcing. I suggest this is the source of the noise. The heat from the micro- arcing and the resistance of the carbonized surface of the insulator eventually lead to ignition and flames. I admit that this is a hypothesis. I believe that the process is more-or-less correct, but the details may not be correct. Best regards, Rich --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new
RE: 10/100 base interface in a plastic box
John, Really good information there regarding treatment of chassis ground evacuation of other layers. I'd add the comment that the layout of the signal etch between the transformer the RJ45 connector (UTP) is also important. Keep the +/- pairs as short, tightly coupled and as symmetrical as possible. We usually do use discrete CM chokes and have never tried backing them out. Regards, Jack Cook Xerox EMC Engineer -Original Message- From: jrbar...@lexmark.com [mailto:jrbar...@lexmark.com] Sent: Wednesday, October 17, 2001 12:57 PM To: Jon Keeble; emc-p...@majordomo.ieee.org Subject: Re: 10/100 base interface in a plastic box Jon, My department has developed ten generations of Ethernet adapters (10BASE2, 10BASE-T, 100BASE-Tx) for IBM/Lexmark printers since 1990. We have looked at, but so far have not used, integrated-magnetics connectors because we like having the option of putting a common-mode choke in between the Ethernet magnetics (transformer-filter) and the connector. In our card layouts we: 1. Define a FRAME_GROUND to connect the metal bodies/shields of all connectors going to the outside world. 2. Connect FRAME_GROUND to GROUND with 4-or-more ground ties, 0.025-inch wide traces on the topside and bottomside of the card. We use at least one pair of ground ties for every 3 inches of beach front with connectors going to the outside world. 3. For the Ethernet interfaces, put a void in all layers stretching from the center of the transformer-filter to the farthest pins of the RJ-45 connector, 0.2 wider than the transformer-filter, common-mode choke, and RJ-45 connectors. The *only* wires permitted in this area are the Ethernet transmit/receive signals. 4. Run FRAME_GROUND down the edge of the card, as wide as we can make it, ending in mounting pads for a metal bracket or the chassis. These pads have non-plated-through holes for the mounting screws circled by eight vias, and are plated with tin or tin-lead on the topside and bottomside. FRAME_GROUND has the same outline in all copper layers, although we sometimes have to leave it as a void in ground planes because of a quirk in Mentor Graphics.Put a via about every 1/2 inch along FRAME_GROUND to connect the layers together. 5. Place a ground tie at each mounting pad topside and bottomside, with additional topside and bottomside ground ties roughly equally spaced in between the mounting pads. During development testing, these groundties can be easily cut with an X-acto knife if it looks like separating FRAME_GROUND from GROUND, or having them connected at only one end, might improve radiated emissions and electrostatic discharge (ESD) immunity. Make sure that solder does not get onto the mounting pads during manufacturing. The mounting pads sit right on the lugs of the metal bracket/chassis. These contact points on the metal bracket/chassis must be bare metal. We recently discovered that a transparent phosphate wash applied to a chassis before powder coating, as a priming step, seriously affected radiated emissions and the ESD immunity. We now require these contact points to be masked off before the chassis goes through any cleaning/painting steps. A machine screw with a built-in belleville washer, and a nut with a captive star washer, hold the card and the metal bracket/chassis in tight metal-to-metal contact despite temperature changes, vibration, creeping of the plating, etc. For our External Network Adapters, the metal bracket is bent into L, and extends all the way under the card. This bracket ties the faces of metal connectors together, connects to FRAME_GROUND, and provides a ground plane all the way under the card to reduce radiated emissions and reduce our susceptibility to tabletop ESD (an IBM test). From the side the card, connectors, and bracket look like this: ! !+--+ !! ! !! ! ! + ! -- insulating spacer, or tab bent up to support card + here-- experiment to see whether having the card and bracket isolated or connected gives the best EMC/ESD results John Barnes Advisory Engineer Lexmark International --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute:
RE: Vertical Ground Plane
Joe, Ref. ANSI C63.4: 1992, para. 5.2.2. The VGP is not required for a floor standing EUT. And on an open area test site, it's optional for a tabletop EUT (but preferred in case of dispute). Has this changed? Sorry, this doesn't answer your question re CISPR 16 but I felt a clarification was appropriate regarding the ANSI requirement - if it hasn't been changed in the new edition. Jack Cook Xerox EMC -Original Message- From: marti...@appliedbiosystems.com [mailto:marti...@appliedbiosystems.com] Sent: Tuesday, August 21, 2001 5:54 PM To: emc-p...@majordomo.ieee.org Subject: Vertical Ground Plane ANSI 63.4 clearly specifies the requirements for a vertical ground plane when performing conducted emissions measurements. I was unable to find such clarifications when reviewing CISPR 16. Do the CISPR standards require a vertical ground plane for conducted emissions? If so, where is this requirement specified? Your assistance is appreciated. Joe Martin Applied Biosystems --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: No longer online until our new server is brought online and the old messages are imported into the new server.
RE: FCC - radiated emission up to 10th harmonic
Cortland, If you were responding to my post re signals that don't leave the silicon, note that I pointed out that there is, at least in some cases, an output of the internal PLL which is not the advertised processor speed, but probably twice that, which is *only* used to generate the processor clock. In other words, your 1 GHz processor may have an internal PLL output of 2 GHz. [I'm basing all this on knowledge of one specific family of CPUs; others may not have this feature.] The only way you might know the actual PLL frequency is to dig into the hardware spec. of the device; many of the board designers won't know or care about this. I certainly agree that the processor clock itself is EMC important since that's what is driving all the internal bus switching and it's practically guaranteed that the harmonics will leak out onto the board etch (on bus lines even the power ground planes as common mode). Although, this hidden PLL output is certainly used per the FCC definition, I seriously doubt you will find any evidence of it with your receiver. I never have. Regardless, I do NOT recommend playing games with the rules. Regards, Jack -Original Message- From: Cortland Richmond [mailto:72146@compuserve.com] Sent: Saturday, August 04, 2001 6:40 PM To: ieee pstc list Subject: Re: FCC - radiated emission up to 10th harmonic During a previous life (heh!) we had applications for FCC grants returned without action because we had applied not for the on-chip frequency, but only for the distributed clock. Actually, testing will show that is the correct approach. A 1 GHz processor can radiate enough that a 66 MHz clock is certainly not the only thing you have to worry about. Cortland --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall, --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall,
RE: FCC - radiated emission up to 10th harmonic
Amund, If you do manage to get through, please ask about signals that never leave the silicon of an ASIC (described by Andy others). A strict interpretation of the FCC wording clearly includes all such signals, but it causes us a lot of pain, especially as frequencies continue to climb. As an example, a micro-processor we have used here has as an input, a 66 MHz clock. It then multiplies that up, to say 866 MHz (memory is fuzzy here). That output is immediately divided by 2 (presumably for a good square wave). It's that 433 MHz that's actually used for internal clocking and is published as the operating speed of that particular processor. I have no problem considering the 433 MHz as the highest fundamental even though it never gets onto an IC pin. Harmonics of that will still possibly/likely be on all the bus lines which do go out to pins and PWB etch. However, the 866 MHz is technically the highest frequency signal used even though it presumably is used only to toggle the one internal divider. Regards, Jack Xerox EMC -Original Message- From: am...@westin.org [mailto:am...@westin.org] Sent: Friday, August 03, 2001 8:23 AM To: emc-p...@majordomo.ieee.org Subject: RE: FCC - radiated emission up to 10th harmonic Hi all! Thanks for responding. I have tried to get in touch with some folks at FCC today, if I manage to get through, I will return with their information / interpretations. Have a nice weekend! Best regards Amund Westin, Oslo/Norway On Fri, 3 Aug 2001 00:29:23 -0700 Don Rhodes don.rho...@infocus.com wrote: I second Jack's thoughts on the wording from part 15, the wording generated or used is very clear. Furthermore, it seems obvious that a PLL generates a new fundamental frequency when multiplying its input frequency. This in turn, of course, creates a new set of harmonics and subharmonics related to the PLL's output frequency. Unfortunately, the FCC's rules do not make exceptions for generated signals which are only used internal to an IC. I know, anyone who's ever struggled with the emissions from a noisy PLL, like myself, has wished for such a break in the rules. Regards, Don EMC Engineering InFocus Corp. -- From:Cook, Jack[SMTP:jack.c...@cax.usa.xerox.com] Reply To:Cook, Jack Sent:Thursday, August 02, 2001 10:27 PM To: 'John Harrington'; Gary McInturff Cc: emc-p...@majordomo.ieee.org Subject: RE: FCC - radiated emission up to 10th harmonic So far, I haven't seen anyone quote the actual wording in FCC Part 15. Here it is, from the table in para. 15.33 (4). Highest frequency generated or used in the device or on which the device operates or tunes (MHz) It doesn't appear to concern itself with *how* the signal is generated (ocillator, PLL, etc.) or whether it's a fundamental or not. So, it seems clear enough to me. Or maybe I'm missing something. Regards, Jack Xerox EMC --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall,
RE: FCC - radiated emission up to 10th harmonic
So far, I haven't seen anyone quote the actual wording in FCC Part 15. Here it is, from the table in para. 15.33 (4). Highest frequency generated or used in the device or on which the device operates or tunes (MHz) It doesn't appear to concern itself with *how* the signal is generated (ocillator, PLL, etc.) or whether it's a fundamental or not. So, it seems clear enough to me. Or maybe I'm missing something. Regards, Jack Xerox EMC --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall,
RE: Creepage dist. for more than 1000V ?
Rich, Not really absurd given the quality of some of the board construction materials I saw in those early days. For one thing, the materials did not suffer heat well for very long (paper/phenolic?) - remember they were still using tubes or later a mix of tubes semi's. I also worked in TV shops during school and can remember thoroughly cooked PCB materials. Regards, Jack Xerox EMC -Original Message- From: Rich Nute [mailto:ri...@sdd.hp.com] Sent: Thursday, August 02, 2001 10:45 AM To: emc-p...@majordomo.ieee.org Subject: Re: Creepage dist. for more than 1000V ? Hi Terry: I don't recall the Sony but do recall the Philco and that Zenith held out with the `hand wired' chassis. Now that you mention it... I do indeed recall that campaign. But, I did not -- then -- realize the context. Today, looking back, that campaign was really quite absurd! But it worked! Best regards, Rich --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall, --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall,
RE: OPEN HOUSE (Flextronics Compliance Labs)
Where are you located? //Jack -Original Message- From: Bill Ronzio [mailto:bill.ron...@flextronics.com] Sent: Tuesday, June 12, 2001 6:30 AM To: emc-p...@majordomo.ieee.org Subject: OPEN HOUSE (Flextronics Compliance Labs) **THIS IS A FREE EVENT** FLEXTRONICS COMPLIANCE LABS IS HOSTING AN OPEN HOUSE (June 21st 11:00am - 4:00pm) (remainder of message deleted) --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Michael Garretson:pstc_ad...@garretson.org Dave Healddavehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://www.rcic.com/ click on Virtual Conference Hall,
RE: Copper Thieving
Why not achieve copper balance by adding extra grounded areas on the surface; ie, copper fill pegged to the normal ground layer(s) at multiple points? Large areas can be gridded in some fashion; it doesn't have to be solid copper. I'm one who does not like to see floating copper, of any size or shape, especially in high frequency areas of a board. Jack Cook Xerox Corp. -Original Message- From: Perry Qu [mailto:perry...@alcatel.com] Sent: Thursday, January 18, 2001 1:19 PM To: Roman, Dan Cc: 'Stephen Phillips'; rehel...@mmm.com; emc-p...@majordomo.ieee.org; DORIN OPREA Subject: Re: Copper Thieving Hi! Dan: I understand that EMC guys don't want to see the floating coppers on the PCB because of ESD and/or emission problem. But on the manufacture side, they claim that if you don't do copper balance on the layer where you have large area without copper, you will sure have over-eching in that area, plus warpage of the board. The question is, where do we find a compromised solution that makes everyone happy ? Regards Perry Roman, Dan wrote: Remember that you can also cause yourself all kinds of EMI headaches if you have electrically floating copper areas or patterns on the board. It has lead to many arguments with the CAD department over the years! -- Dan -Original Message- From: Stephen Phillips [mailto:step...@cisco.com] Sent: Thursday, January 18, 2001 9:33 AM To: rehel...@mmm.com; emc-p...@majordomo.ieee.org Subject: Re: Copper Thieving Copper applied to the outer PCB layers, in a pattern, to even out the copper placement so the board is less likely to warp through soldering. Obviously, it would be put where there is not etch, large open areas, to somewhat offset where you might have planes of copper elsewhere on the layer. Beware of Creepage and Clearance violations (if applicable). Some PCB fab. houses have carte-blanche to add this, we don't allow that - and control it as part of our own PCB CAD instead. Best regards, Stephen At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: Please excuse my lack of knowledge..what is copper thieving? --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Dithered clocks and EMC - BEWARE
Lacey others, Interesting. But with only the 2nd harmonic being your problem, it's possible the dithered clock's energy envelope was mostly or all still within the 120 kHz passband of the EMI receiver, depending upon the amount of dithering. Was this the case? I'm curious about the digital TV receiver report. I understand that the entire 6 MHz of a digital TV channel's frequency allocation appears to be filled with content as opposed to the old analog TV systems which basically had audio video sub-carriers. This suggests the digital receiver front end designs are different (more vulnerable?). Hopefully, there are others on this forum that can explain. Jack Cook, Xerox Corp -Original Message- From: Lacey,Scott [mailto:sla...@foxboro.com] Sent: Friday, March 17, 2000 8:19 AM To: 'Robert Macy' Cc: 'emc-p...@ieee.org' Subject: RE: Dithered clocks and EMC - BEWARE Robert, and the group, Although I have only limited experience (1 instance) with dithered clocks, I thought that I might share that experience with the group. I had a product that was failing radiated emissions at one particular frequency with a vertical antenna orientation. I tracked the problem down to a particular cable and circuit card. Use of a near field probe identified the oscillator package as the source of the emissions (the second harmonic). The device was located near the card edge, insufficient decoupling, etc. All the textbook layout errors. A check of the oscillator specifications showed that it was a standard TTL device with a fanout of 10 inputs. I had already found some fixes that would reduce emissions, clamp-on ferrites, additional shielding, etc., but thought it made more sense to reduce the emissions at the source. I suggested to the design engineer that a low-power TTL oscillator, with a fanout of 2 inputs, would reduce currents through the offending etches. Someone else suggested a dithered clock device instead. When we tested the dithered clock, emissions were actually worse. We had simply spread the problem over a wider spectrum. I have heard some success stories for these devices, but results in this case were disappointing. I still think a lot depends on the layout. I strongly suspect that real-world disruption to nearby devices is generally going to be worse, since the idea behind these devices is to fool quasi-peak measurements in order to pass. Caveat Emptor! Scott Lacey -Original Message- From: Robert Macy [SMTP:m...@california.com] Sent: Friday, March 17, 2000 9:38 AM To: emc-p...@ieee.org Subject:Fw: Dithered clocks and EMC - BEWARE Of interest, so I forward this to the group: - Robert - Robert A. Macy, PEm...@california.com 408 286 3985 fx 408 297 9121 AJM International Electronics Consultants 619 North First St, San Jose, CA 95112 -Original Message- From: John Woodgate j...@jmwa.demon.co.uk Newsgroups: sci.engr.electrical.compliance,sci.electronics.design Date: Tuesday, March 14, 2000 11:55 PM Subject: Dithered clocks and EMC - BEWARE About a year ago we had a thread on this subject, concluding that some research was needed to see whether dithered clocks were better or worse in terms of conforming to EMC requirements. I learned very recently that some reliable but as-yet unpublished research has found that digital TV receivers are some 40 dB (!!) more sensitive to dithered clock emissions than to unmodulated carriers. This is likely to lead to changes in EMC limits within maybe as little as three years, since the authorities certainly don't want to be deluged with complaints of interference from people who have just opted for digital TV. So, if you are thinking of using a dithered clock, think again! -- Regards, John Woodgate, OOO - Own Opinions Only. Phone +44 (0)1268 747839 Fax +44 (0)1268 777124. http://www.jmwa.demon.co.uk I wanted to make a fully-automated nuclear-powered trawler, but it went into spontaneous fishing. --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society
RE: Definition of Residential location
Richard, There's a note in EN55022 after paragraph 4.1 which reads as follows: NOTE - The domestic environment is an environment where the use of broadcast radio and television receivers may be expected within a distance of 10 m of the apparatus concerned. Jack Cook Xerox Corp. --- woods%sensormatic@interlock.lexmark.com on 11/16/99 01:53:28 PM Please respond to woods%sensormatic@interlock.lexmark.com To: emc-pstc%majordomo.ieee@interlock.lexmark.com cc:(bcc: George Alspaugh/Lex/Lexmark) Subject: Definition of Residental location What is the official definition of a residential location as it is used in the EN emission standards (e.g., EN50081-1)? Richard Woods - - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
USB Shield Grounding
A question regarding the Universal Serial Bus (USB) Specification. USB spec. 1.0 required the cable shield at the peripheral end to be DC isolated from the chassis; ie, it could be terminated only through a capacitor(s). That requirement always seemed strange for a cable with a max. length of 5 meters. And it has caused us some trouble with EMI. Now, if I'm reading it correctly, USB 1.1 has quietly removed that restriction and allows the shield to be grounded to the chassis at both ends (as it should have been from the start!). Is this correct? Thanks, Jack Cook, EMC Engineer, Xerox Corp. jack.c...@cax.usa.xerox.com - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: Question on internal ESD testing
Charles, This is a contentious subject for us due to the time it takes to thoroughly test a large product, so I'd be interested in hearing other's opinions and practices. A scenario where ESD can cause a genuine problem (in our business) is when someone walks across a room to add paper to a printer tray. In some machines, the unit will be in standby mode. In others, it may continue printing from a different tray or cabinet. In either case, a discharge to the internal metal parts of the paper tray could conceivably cause problems we would consider failures (and have). Jack Cook EMC Engineer, Xerox Corp. jack.c...@cax.usa.xerox.com (310)333-5214 -Original Message- From: Grasso, Charles (Chaz) [mailto:gra...@louisville.stortek.com] Sent: Friday, August 13, 1999 9:35 AM To: 'EMC Group' Subject: Question on internal ESD testing Hello, Does anyone in this august group apply ESD discharges INTERNAL to a product as required by EN55024. I consider this just a tad egregious - don't you? Thank you Charles Grasso Advisory Engineer StorageTek 2270Sth 88th Street Louisville CO 80027 M/S 4247. Tel:303-673-2908 Fax:303-661-7115 email:gra...@louisville.stortek.com Web Site: http://www.ewh.ieee.org/r5/denver/rockymountainemc/ - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
